Searched full:cpu_pll (Results 1 – 11 of 11) sorted by relevance
| /linux-5.10/arch/mips/ath79/ |
| D | clock.c | 239 u32 cpu_pll, ddr_pll; in ar934x_clocks_init() local
277 cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, in ar934x_clocks_init()
315 cpu_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
327 ddr_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
337 ahb_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
357 u32 cpu_pll, ddr_pll; in qca953x_clocks_init() local
378 cpu_pll = nint * ref_rate / ref_div; in qca953x_clocks_init()
379 cpu_pll += frac * (ref_rate >> 6) / ref_div; in qca953x_clocks_init()
380 cpu_pll /= (1 << out_div); in qca953x_clocks_init()
404 cpu_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
[all …]
|
| /linux-5.10/drivers/clk/mxs/ |
| D | clk-imx23.c | 77 static const char *const cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", };
82 lcdif_sel, gpmi_sel, ssp_sel, emi_sel, cpu, etm_sel, cpu_pll, enumerator
125 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx23_clocks_init()
|
| D | clk-imx28.c | 128 static const char *const cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", };
136 lcdif_sel, cpu, ptp_sel, cpu_pll, cpu_xtal, hbus, xbus, enumerator
190 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx28_clocks_init()
|
| /linux-5.10/drivers/misc/habanalabs/include/goya/ |
| D | goya_fw_if.h | 19 CPU_PLL = 0, enumerator
|
| /linux-5.10/drivers/misc/habanalabs/include/gaudi/ |
| D | gaudi_fw_if.h | 22 CPU_PLL = 0, enumerator
|
| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | imx23-clock.yaml | 32 cpu_pll 13
|
| D | imx28-clock.yaml | 42 cpu_pll 23
|
| /linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/ |
| D | cpu_pll_regs.h | 18 * CPU_PLL (Prototype: PLL)
|
| /linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | mti,gic.yaml | 137 clocks = <&cpu_pll>;
|
| /linux-5.10/drivers/clk/baikal-t1/ |
| D | clk-ccu-pll.c | 63 CCU_PLL_INFO(CCU_CPU_PLL, "cpu_pll", "ref_clk", CCU_CPU_PLL_BASE,
|
| /linux-5.10/arch/mips/ralink/ |
| D | mt7620.c | 543 pr_debug(RFMT("XTAL") RFMT("CPU_PLL") RFMT("PLL"), in ralink_clk_init()
|