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/linux-5.10/drivers/hwtracing/coresight/
DMakefile3 # Makefile for CoreSight drivers.
5 obj-$(CONFIG_CORESIGHT) += coresight.o
6 coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \
7 coresight-sysfs.o
8 obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o
9 coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \
10 coresight-tmc-etr.o
11 obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o
12 obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o
13 obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
[all …]
DKconfig3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
12 This framework provides a kernel interface for the CoreSight debug
14 a topological view of the CoreSight components based on a DT
19 module will be called coresight.
21 if CORESIGHT
23 tristate "CoreSight Link and Sink drivers"
25 This enables support for CoreSight link and sink drivers that are
31 modules will be called coresight-funnel and coresight-replicator.
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Dcoresight-replicator.c5 * Description: CoreSight Replicator driver
20 #include <linux/coresight.h>
22 #include "coresight-priv.h"
226 of_device_is_compatible(dev->of_node, "arm,coresight-replicator")) in replicator_probe()
228 "Uses OBSOLETE CoreSight replicator binding\n"); in replicator_probe()
356 {.compatible = "arm,coresight-replicator"},
357 {.compatible = "arm,coresight-static-replicator"},
365 {"ARMHC985", 0}, /* ARM CoreSight Static Replicator */
376 .name = "coresight-static-replicator",
398 CS_AMBA_ID(0x000bb9ec), /* Coresight SoC-600 */
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Dcoresight-funnel.c5 * Description: CoreSight Funnel driver
19 #include <linux/coresight.h>
23 #include "coresight-priv.h"
215 of_device_is_compatible(dev->of_node, "arm,coresight-funnel")) in funnel_probe()
216 dev_warn_once(dev, "Uses OBSOLETE CoreSight funnel binding\n"); in funnel_probe()
339 {.compatible = "arm,coresight-static-funnel"},
358 .name = "coresight-static-funnel",
384 /* Coresight SoC-600 */
395 .name = "coresight-dynamic-funnel",
435 MODULE_DESCRIPTION("Arm CoreSight Funnel Driver");
Dcoresight-priv.h12 #include <linux/coresight.h>
16 * Coresight management registers (0xf00-0xfcc)
32 * Coresight device CLAIM protocol.
185 * Macros and inline functions to handle CoreSight UCI data and driver
189 /* coresight AMBA ID, no UCI, no driver data: id table entry */
196 /* coresight AMBA ID, UCI with driver data only: id table entry. */
207 /* coresight AMBA ID, full UCI structure: id table entry. */
/linux-5.10/Documentation/devicetree/bindings/arm/
Dcoresight.txt1 * CoreSight Components:
3 CoreSight components are compliant with the ARM CoreSight architecture
8 sink. Each CoreSight component device should use these properties to describe
17 "arm,coresight-etb10", "arm,primecell";
20 "arm,coresight-tpiu", "arm,primecell";
26 "arm,coresight-tmc", "arm,primecell";
29 "arm,coresight-dynamic-funnel", "arm,primecell";
30 "arm,coresight-funnel", "arm,primecell"; (OBSOLETE. For
35 "arm,coresight-etm3x", "arm,primecell";
38 "arm,coresight-etm4x", "arm,primecell";
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Dcoresight-cti.yaml5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
12 to one or more CoreSight components and/or a CPU, with CTIs interconnected in
15 not part of the CoreSight graph described in the general CoreSight bindings
16 file coresight.txt.
38 indicate this feature (arm,coresight-cti-v8-arch).
49 between CTI and other CoreSight components.
51 Certain triggers between CoreSight devices and the CTI have specific types
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
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Dcoresight-cpu-debug.txt1 * CoreSight CPU Debug Component:
3 CoreSight CPU debug component are compliant with the ARMv8 architecture
6 external debug, and it can be accessed from mmio region from Coresight
14 - compatible : should be "arm,coresight-cpu-debug"; supplemented with
44 compatible = "arm,coresight-cpu-debug","arm,primecell";
/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-coresight-devices-etm4x1 What: /sys/bus/coresight/devices/etm<N>/enable_source
8 of coresight components linking the source to the sink is
9 configured and managed automatically by the coresight framework.
11 What: /sys/bus/coresight/devices/etm<N>/cpu
17 What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
24 What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
31 What: /sys/bus/coresight/devices/etm<N>/nr_cntr
38 What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
44 What: /sys/bus/coresight/devices/etm<N>/numcidc
51 What: /sys/bus/coresight/devices/etm<N>/numvmidc
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Dsysfs-bus-coresight-devices-cti1 What: /sys/bus/coresight/devices/<cti-name>/enable
7 What: /sys/bus/coresight/devices/<cti-name>/powered
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
44 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals
50 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types
57 What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel
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Dsysfs-bus-coresight-devices-etm3x1 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/enable_source
8 of coresight components linking the source to the sink is
9 configured and managed automatically by the coresight framework.
11 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_idx
18 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_acctype
29 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_range
37 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_single
45 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_start
53 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_stop
61 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/cntr_idx
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Dsysfs-bus-coresight-devices-tmc1 What: /sys/bus/coresight/devices/<memory_map>.tmc/trigger_cntr
10 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rsz
17 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
24 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
33 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rwp
39 the CoreSight bus into the Trace RAM. The value is read directly
42 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/trg
49 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
56 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
64 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffcr
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Dsysfs-bus-coresight-devices-etb101 What: /sys/bus/coresight/devices/<memory_map>.etb/enable_sink
10 echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
12 What: /sys/bus/coresight/devices/<memory_map>.etb/trigger_cntr
22 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
29 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
36 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
45 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp
51 the CoreSight bus into the Trace RAM. The value is read directly
54 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg
61 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
[all …]
Dsysfs-bus-coresight-devices-stm1 What: /sys/bus/coresight/devices/<memory_map>.stm/enable_source
8 of coresight components linking the source to the sink is
9 configured and managed automatically by the coresight framework.
11 What: /sys/bus/coresight/devices/<memory_map>.stm/hwevent_enable
18 What: /sys/bus/coresight/devices/<memory_map>.stm/hwevent_select
26 What: /sys/bus/coresight/devices/<memory_map>.stm/port_enable
34 What: /sys/bus/coresight/devices/<memory_map>.stm/port_select
41 What: /sys/bus/coresight/devices/<memory_map>.stm/status
48 What: /sys/bus/coresight/devices/<memory_map>.stm/traceid
/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi6220-coresight.dtsi3 * dtsi file for Hisilicon Hi6220 coresight
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
39 compatible = "arm,coresight-tmc", "arm,primecell";
64 compatible = "arm,coresight-static-replicator";
100 compatible = "arm,coresight-tmc", "arm,primecell";
116 compatible = "arm,coresight-tpiu", "arm,primecell";
132 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
217 compatible = "arm,coresight-etm4x", "arm,primecell";
236 compatible = "arm,coresight-etm4x", "arm,primecell";
255 compatible = "arm,coresight-etm4x", "arm,primecell";
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Dhi3660-coresight.dtsi4 * dtsi for Hisilicon Hi3660 Coresight
15 compatible = "arm,coresight-etm4x", "arm,primecell";
32 compatible = "arm,coresight-etm4x", "arm,primecell";
49 compatible = "arm,coresight-etm4x", "arm,primecell";
66 compatible = "arm,coresight-etm4x", "arm,primecell";
83 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
132 compatible = "arm,coresight-tmc", "arm,primecell";
158 compatible = "arm,coresight-etm4x", "arm,primecell";
175 compatible = "arm,coresight-etm4x", "arm,primecell";
192 compatible = "arm,coresight-etm4x", "arm,primecell";
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/linux-5.10/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
11 Coresight is an umbrella of technologies allowing for the debugging of ARM
24 flows through the coresight system (via ATB bus) using links that are connecting
25 the emanating source to a sink(s). Sinks serve as endpoints to the coresight
28 host without fear of filling up the onboard coresight memory buffer.
30 At typical coresight system would look like this::
85 a way to aggregate and distribute signals between CoreSight components.
87 The coresight framework provides a central point to represent, configure and
88 manage coresight devices on a platform. This first implementation centers on
133 See Documentation/devicetree/bindings/arm/coresight.txt for details.
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Dcoresight-cpu-debug.rst2 Coresight CPU Debug Module
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
107 power down in the way that the CoreSight / Debug designers anticipated.
120 See Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt for details.
183 coresight-cpu-debug 850000.debug: CPU[0]:
184 coresight-cpu-debug 850000.debug: EDPRSR: 00000001 (Power:On DLK:Unlock)
185 coresight-cpu-debug 850000.debug: EDPCSR: handle_IPI+0x174/0x1d8
186 coresight-cpu-debug 850000.debug: EDCIDSR: 00000000
187 …coresight-cpu-debug 850000.debug: EDVIDSR: 90000000 (State:Non-secure Mode:EL1/0 Width:64bits VMI…
188 coresight-cpu-debug 852000.debug: CPU[1]:
[all …]
Dcoresight-ect.rst4 CoreSight Embedded Cross Trigger (CTI & CTM).
13 The CoreSight Cross Trigger Interface (CTI) is a hardware device that takes
41 CoreSight devices on the trace data path. When these devices are enabled the
50 The hardware trigger signals can also be connected to non-CoreSight devices
62 The CTI devices appear on the existing CoreSight bus alongside the other
63 CoreSight devices::
65 >$ ls /sys/bus/coresight/devices
71 can be associated with other CoreSight devices, or other system hardware
74 >$ ls /sys/bus/coresight/devices/etm0/cti_cpu0
91 * ``mgmt``: the standard CoreSight management registers.
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/linux-5.10/arch/arm/boot/dts/
Dhip04.dtsi272 compatible = "arm,coresight-etb10", "arm,primecell";
287 compatible = "arm,coresight-etb10", "arm,primecell";
302 compatible = "arm,coresight-etb10", "arm,primecell";
317 compatible = "arm,coresight-etb10", "arm,primecell";
332 compatible = "arm,coresight-tpiu", "arm,primecell";
350 compatible = "arm,coresight-static-replicator";
385 compatible = "arm,coresight-static-replicator";
420 compatible = "arm,coresight-static-replicator";
454 compatible = "arm,coresight-static-replicator";
485 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
[all …]
/linux-5.10/drivers/acpi/
Dacpi_amba.c24 {"ARMHC500", 0}, /* ARM CoreSight ETM4x */
25 {"ARMHC501", 0}, /* ARM CoreSight ETR */
26 {"ARMHC502", 0}, /* ARM CoreSight STM */
27 {"ARMHC503", 0}, /* ARM CoreSight Debug */
28 {"ARMHC979", 0}, /* ARM CoreSight TPIU */
29 {"ARMHC97C", 0}, /* ARM CoreSight SoC-400 TMC, SoC-600 ETF/ETB */
30 {"ARMHC98D", 0}, /* ARM CoreSight Dynamic Replicator */
31 {"ARMHC9CA", 0}, /* ARM CoreSight CATU */
32 {"ARMHC9FF", 0}, /* ARM CoreSight Dynamic Funnel */
/linux-5.10/arch/arm64/boot/dts/sprd/
Dsc9863a.dtsi188 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
212 compatible = "arm,coresight-tmc", "arm,primecell";
228 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
277 compatible = "arm,coresight-tmc", "arm,primecell";
302 compatible = "arm,coresight-tmc", "arm,primecell";
327 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
364 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
413 compatible = "arm,coresight-etm4x", "arm,primecell";
430 compatible = "arm,coresight-etm4x", "arm,primecell";
447 compatible = "arm,coresight-etm4x", "arm,primecell";
[all …]
Dsc9836.dtsi49 compatible = "arm,coresight-tmc", "arm,primecell";
63 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
119 compatible = "arm,coresight-etm4x", "arm,primecell";
135 compatible = "arm,coresight-etm4x", "arm,primecell";
151 compatible = "arm,coresight-etm4x", "arm,primecell";
167 compatible = "arm,coresight-etm4x", "arm,primecell";
183 compatible = "arm,coresight-stm", "arm,primecell";
Dsc9860.dtsi303 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
338 compatible = "arm,coresight-tmc", "arm,primecell";
353 compatible = "arm,coresight-stm", "arm,primecell";
370 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
418 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
466 compatible = "arm,coresight-tmc", "arm,primecell";
491 compatible = "arm,coresight-tmc", "arm,primecell";
516 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
553 compatible = "arm,coresight-etm4x", "arm,primecell";
570 compatible = "arm,coresight-etm4x", "arm,primecell";
[all …]
/linux-5.10/arch/arm64/boot/dts/arm/
Djuno-base.dtsi118 * Juno TRMs specify the size for these coresight components as 64K.
123 compatible = "arm,coresight-tmc", "arm,primecell";
147 compatible = "arm,coresight-tpiu", "arm,primecell";
164 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
200 compatible = "arm,coresight-tmc", "arm,primecell";
218 compatible = "arm,coresight-stm", "arm,primecell";
235 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
270 compatible = "arm,coresight-cpu-debug", "arm,primecell";
279 compatible = "arm,coresight-etm4x", "arm,primecell";
295 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
[all …]

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