Searched +full:coresight +full:- +full:cti +full:- +full:dt (Results 1 – 7 of 7) sorted by relevance
| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
12 to one or more CoreSight components and/or a CPU, with CTIs interconnected in
15 not part of the CoreSight graph described in the general CoreSight bindings
16 file coresight.txt.
18 The CTI component properties define the connections between the individual
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| D | coresight.txt | 1 * CoreSight Components:
3 CoreSight components are compliant with the ARM CoreSight architecture
8 sink. Each CoreSight component device should use these properties to describe
11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
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| /linux-5.10/drivers/hwtracing/coresight/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
12 This framework provides a kernel interface for the CoreSight debug
14 a topological view of the CoreSight components based on a DT
19 module will be called coresight.
21 if CORESIGHT
23 tristate "CoreSight Link and Sink drivers"
25 This enables support for CoreSight link and sink drivers that are
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| D | coresight-cti-platform.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/coresight.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
14 #include "coresight-cti.h"
15 #include "coresight-priv.h"
17 /* Number of CTI signals in the v8 architecturally defined connection */
22 /* CTI device tree trigger connection node keyword */
23 #define CTI_DT_CONNS "trig-conns"
25 /* CTI device tree connection property keywords */
26 #define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch"
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| D | coresight-cti-sysfs.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/coresight.h>
15 #include "coresight-cti.h"
25 * include\dt-bindings\arm\coresight-cti-dt.h
85 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); in enable_show()
87 enable_req = atomic_read(&drvdata->config.enable_req_count); in enable_show()
88 spin_lock(&drvdata->spinlock); in enable_show()
89 powered = drvdata->config.hw_powered; in enable_show()
90 enabled = drvdata->config.hw_enabled; in enable_show()
91 spin_unlock(&drvdata->spinlock); in enable_show()
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| /linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&intc>;
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| /linux-5.10/ |
| D | MAINTAINERS | 9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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