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/linux-3.3/include/linux/
Ddcbnl.h35 * @willing: willing bit in ETS configuration TLV
183 * @DCB_CMD_PGTX_GCFG: request the priority group configuration for Tx
184 * @DCB_CMD_PGTX_SCFG: set the priority group configuration for Tx
185 * @DCB_CMD_PGRX_GCFG: request the priority group configuration for Rx
186 * @DCB_CMD_PGRX_SCFG: set the priority group configuration for Rx
187 * @DCB_CMD_PFC_GCFG: request the priority flow control configuration
188 * @DCB_CMD_PFC_SCFG: set the priority flow control configuration
195 * @DCB_CMD_GBCN: set backward congestion notification configuration
197 * @DCB_CMD_GAPP: get application protocol configuration
198 * @DCB_CMD_SAPP: set application protocol configuration
[all …]
Drio_drv.h51 * rio_local_read_config_32 - Read 32 bits from local configuration space
53 * @offset: Offset into local configuration space
57 * device's configuration space.
66 * rio_local_write_config_32 - Write 32 bits to local configuration space
68 * @offset: Offset into local configuration space
72 * device's configuration space.
81 * rio_local_read_config_16 - Read 16 bits from local configuration space
83 * @offset: Offset into local configuration space
87 * device's configuration space.
96 * rio_local_write_config_16 - Write 16 bits to local configuration space
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Dscx200.h14 /* F0 PCI Header/Bridge Configuration Registers */
21 /* General Configuration Block */
25 #define SCx200_WDT_OFFSET 0x00 /* offset within configuration block */
29 #define SCx200_WDT_WDCNFG 0x02 /* Configuration Register */
41 /* Pin Multiplexing and Miscellaneous Configuration Registers */
46 #define SCx200_MCR 0x34 /* Miscellaneous Configuration Register */
50 #define SCx200_CBA 0x3e /* Configuration Base Address Register */
51 #define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */
/linux-3.3/Documentation/hwmon/
Dsmsc47b39784 CONFIGURATION SEQUENCE
85 To program the configuration registers, the following sequence must be followed:
86 1. Enter Configuration Mode
87 2. Configure the Configuration Registers
88 3. Exit Configuration Mode.
90 Enter Configuration Mode
91 To place the chip into the Configuration State The config key (0x55) is written
94 Configuration Mode
95 In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
98 The desired configuration registers are accessed in two steps:
[all …]
/linux-3.3/Documentation/arm/msm/
Dgpiomux.txt2 is used to provide gpio pin multiplexing and configuration on mach-msm
8 The first-generation API for gpio configuration & multiplexing on msm
40 - Tabular configuration. Instead of having to call gpio_tlmm_config
41 hundreds of times, gpio configuration is placed in a single table.
45 equates to a sensible default of 'no configuration', preventing users
52 To use gpiomux, provide configuration information for relevant gpio lines
70 The effect of this configuration is as follows:
77 above 0, its active configuration will be applied. Since no other gpio
78 line has a valid active configuration, msm_gpiomux_get() will have no
83 Since no other gpio line has a valid suspended configuration, no other
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/linux-3.3/arch/arm/mach-ks8695/include/mach/
Dregs-pci.h19 #define KS8695_CRCFID (0x000) /* Configuration: Identification */
20 #define KS8695_CRCFCS (0x004) /* Configuration: Command and Status */
21 #define KS8695_CRCFRV (0x008) /* Configuration: Revision */
22 #define KS8695_CRCFLT (0x00C) /* Configuration: Latency Timer */
23 #define KS8695_CRCBMA (0x010) /* Configuration: Base Memory Address */
24 #define KS8695_CRCSID (0x02C) /* Configuration: Subsystem ID */
25 #define KS8695_CRCFIT (0x03C) /* Configuration: Interrupt */
26 #define KS8695_PBCA (0x100) /* Bridge Configuration Address */
27 #define KS8695_PBCD (0x104) /* Bridge Configuration Data */
40 /* Configuration: Identification */
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/linux-3.3/arch/arm/mach-at91/include/mach/
Dat91cap9_matrix.h20 #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
21 #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
22 #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
23 #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
24 #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
25 #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
26 #define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
27 #define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
28 #define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
29 #define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */
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Dat91sam9g45_matrix.h18 #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
19 #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
20 #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
21 #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
22 #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
23 #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
24 #define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
25 #define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
26 #define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
27 #define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */
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Dat91sam9263_matrix.h18 #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
19 #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
20 #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
21 #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
22 #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
23 #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
24 #define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
25 #define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
26 #define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
34 #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
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Dat91sam9rl_matrix.h17 #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
18 #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
19 #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
20 #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
21 #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
22 #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
30 #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
31 #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
32 #define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
33 #define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
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Dat91sam9260_matrix.h18 #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
19 #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
20 #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
21 #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
22 #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
23 #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
31 #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
32 #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
33 #define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
34 #define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
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Dat91sam9261_matrix.h18 #define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */
22 #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */
23 #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */
24 #define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */
25 #define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */
26 #define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */
34 #define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */
59 #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
/linux-3.3/Documentation/frv/
Dconfiguring.txt2 FUJITSU FR-V LINUX KERNEL CONFIGURATION
6 CONFIGURATION OPTIONS
10 presented in the configuration tools available):
18 the kernel configuration that need to be considered.
44 There are some architecture specific configuration options in the "General
45 Setup" section of the kernel configuration too:
68 kernel configuration especially for debugging a kernel on this
80 Default configuration for the MB93091-VDK with both CPU board and
86 Default configuration for the MB93091-VDK with CPU board,
93 Default configuration for the MB93093-PDK board running uClinux.
[all …]
/linux-3.3/drivers/rapidio/
Drio-access.c2 * RapidIO configuration space access support
18 * configuration space and doorbell access.
24 * Wrappers for all RIO configuration access functions. They just check
35 * @size: Size of configuration space read (8, 16, 32 bits)
37 * @len: Length of configuration space read (1, 2, 4 bytes)
40 * configuration space registers on the local device.
59 * @size: Size of configuration space write (8, 16, 32 bits)
61 * @len: Length of configuration space write (1, 2, 4 bytes)
64 * configuration space registers on the local device.
95 * @size: Size of configuration space read (8, 16, 32 bits)
[all …]
/linux-3.3/arch/arm/mach-pxa/include/mach/
Dsmemc.h18 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
23 #define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
29 …ine MCATT0 (SMEMC_VIRT + 0x30) /* Card interface Attribute Space Socket 0 Timing Configuration */
30 …ine MCATT1 (SMEMC_VIRT + 0x34) /* Card interface Attribute Space Socket 1 Timing Configuration */
31 #define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */
32 #define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */
35 #define MEMCLKCFG (SMEMC_VIRT + 0x68) /* Clock Configuration */
36 #define CSADRCFG0 (SMEMC_VIRT + 0x80) /* Address Configuration Register for CS0 */
37 #define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */
38 #define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */
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Dpxa27x-udc.h17 #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */
25 Configuration */
26 #define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration
41 #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */
50 #define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */
204 #define UDCCRA __REG(0x40600404) /* Configuration register EPA */
205 #define UDCCRB __REG(0x40600408) /* Configuration register EPB */
206 #define UDCCRC __REG(0x4060040C) /* Configuration register EPC */
207 #define UDCCRD __REG(0x40600410) /* Configuration register EPD */
208 #define UDCCRE __REG(0x40600414) /* Configuration register EPE */
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/linux-3.3/arch/arm/plat-samsung/include/plat/
Dgpio-cfg-helpers.h8 * Samsung Platform - GPIO pin configuration helper definitions
22 /* As a note, all gpio configuration functions are entered exclusively, either
60 * s3c24xx_gpio_setpull_1up() - Pull configuration for choice of up or none.
72 * s3c24xx_gpio_setpull_1down() - Pull configuration for choice of down or none
84 * samsung_gpio_setpull_upown() - Pull configuration for choice of up,
102 * samsung_gpio_getpull_updown() - Get configuration for choice of up,
106 * @off: The offset to the pin to get the configuration of.
115 * s3c24xx_gpio_getpull_1up() - Get configuration for choice of up or none
117 * @off: The offset to the pin to get the configuration of.
126 * s3c24xx_gpio_getpull_1down() - Get configuration for choice of down or none
[all …]
Dgpio-cfg.h8 * S3C Platform - GPIO pin configuration
16 * pin configuration done such as setting a pin to input or output or
36 * struct samsung_gpio_cfg GPIO configuration
37 * @cfg_eint: Configuration setting when used for external interrupt source
38 * @get_pull: Read the current pull configuration for the GPIO
40 * @set_config: Set the current configuration for the GPIO
41 * @get_config: Read the current configuration for the GPIO
46 * per-bank configuration information that other systems such as the
80 * @to to The configuration for the pin's function.
88 * will then generate the correct bit mask and shift for the configuration.
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/linux-3.3/drivers/staging/comedi/drivers/
Ddt2815.c33 Configuration options:
36 [2] - Voltage unipolar/bipolar configuration
39 [3] - Current offset configuration
42 [4] - Firmware program configuration
47 [5] - Analog output 0 range configuration
50 [6] - Analog output 1 range configuration (same options)
51 [7] - Analog output 2 range configuration (same options)
52 [8] - Analog output 3 range configuration (same options)
53 [9] - Analog output 4 range configuration (same options)
54 [10] - Analog output 5 range configuration (same options)
[all …]
/linux-3.3/drivers/staging/speakup/
DKconfig49 or m to build it as a module. See the configuration
57 or m to build it as a module. See the configuration
65 or m to build it as a module. See the configuration
73 build it as a module. See the configuration help on the
81 or m to build it as a module. See the configuration
90 or m to build it as a module. See the configuration
100 configuration help on the Speakup choice above for more
110 a module. See the configuration help on the Speakup
132 configuration help on the Speakup choice above for more
142 configuration help on the Speakup choice above for more
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/linux-3.3/include/linux/usb/
Dcomposite.h27 * functions within any single configuration, and (b) Multi-configuration
29 * having more than one function per configuration.
31 * Example: a device with a single configuration supporting both network
52 * struct usb_function - describes one function of a configuration
67 * configuration with which this function is associated.
91 * associated by @usb_add_function() with a one configuration; that function
103 * than one configuration at a given speed, it needs to support multiple
104 * usb_function structures (one for each configuration).
109 * two or more distinct instances within the same configuration, providing
127 /* configuration management: bind/unbind */
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/linux-3.3/Documentation/serial/
Dstallion.txt43 If you require DIP switch settings, EISA or MCA configuration files, or any
57 configuration structure. Note that kernel PCI support is required to use PCI
62 the driver configuration as module arguments. The other method is to modify
63 the driver source to add configuration lines for each board in use.
66 configuration method should be used. A lot of Linux distributions come with
71 2.1 MODULE DRIVER CONFIGURATION:
73 The simplest configuration for modules is to use the module load arguments
75 detected, so do not need any additional configuration at all.
101 when loading the driver. The general form of the configuration argument is
123 Up to 4 board configuration arguments can be specified on the load line.
[all …]
/linux-3.3/drivers/tty/serial/
Dsunsab.h23 u8 ccr0; /* Channel Configuration Register 0 */
24 u8 ccr1; /* Channel Configuration Register 1 */
25 u8 ccr2; /* Channel Configuration Register 2 */
26 u8 ccr3; /* Channel Configuration Register 3 */
31 u8 ipc; /* Interrupt Port Configuration */
36 u8 pcr; /* Port Configuration Register */
37 u8 ccr4; /* Channel Configuration Register 4 */
198 /* Channel Configuration Register 0 (CCR0) */
211 /* Channel Configuration Register 1 (CCR1) */
216 /* Channel Configuration Register 2 (CCR2) */
[all …]
/linux-3.3/Documentation/networking/
Dcs89x0.txt29 2.0 ADAPTER INSTALLATION and CONFIGURATION
30 2.1 CS8900-based Adapter Configuration
31 2.2 CS8920-based Adapter Configuration
72 such, the configuration procedures differ somewhat between the two types of
73 adapters. Refer to the "Adapter Configuration" section for details on
143 2.0 ADAPTER INSTALLATION and CONFIGURATION
148 Utility if you want to change the adapter's configuration in EEPROM.
151 configuration parameters on the command-line to override the EEPROM's settings
152 or for interface configuration when an EEPROM is not used. (CS8920-based
158 installing a CS8900-based adapter and the default configuration is acceptable.)
[all …]
/linux-3.3/Documentation/video4linux/
Domap3isp.txt79 (When using parallel interface one must pay account to correct configuration
103 does not fall under the standard IOCTLs --- gamma tables and configuration of
141 The update field in the structures tells whether to update the configuration
148 configuration data for the function.
183 The associated configuration pointer for the function may not be NULL when
184 enabling the function. When disabling a function the configuration pointer is
191 The statistics subdevs do offer more dynamic configuration options than the
224 module's data output depends on the requested configuration. Although the
229 module or request the necessary buffer size during the first configuration
232 The internal buffer size allocation considers the requested configuration's
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