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/qemu/target/hexagon/imported/
H A Dsubinsns.idef48 Q6INSN(SA1_combinezr,"Rdd8=combine(#0,Rs16)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(…
49 Q6INSN(SA1_combinerz,"Rdd8=combine(Rs16,#0)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(…
50 Q6INSN(SA1_combine0i,"Rdd8=combine(#0,#u2)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(0…
51 Q6INSN(SA1_combine1i,"Rdd8=combine(#1,#u2)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(0…
52 Q6INSN(SA1_combine2i,"Rdd8=combine(#2,#u2)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(0…
53 Q6INSN(SA1_combine3i,"Rdd8=combine(#3,#u2)", ATTRIBS(A_SUBINSN,A_ROPS_2),"Combines", { fSETWORD(0…
H A Dcompare.idef236 Q6INSN(C2_ccombinewnewt,"if (Pu4.new) Rdd32=combine(Rs32,Rt32)",ATTRIBS(A_ARCHV2),
237 "Conditionally combine two words into a register pair",
244 Q6INSN(C2_ccombinewnewf,"if (!Pu4.new) Rdd32=combine(Rs32,Rt32)",ATTRIBS(A_ARCHV2),
245 "Conditionally combine two words into a register pair",
252 Q6INSN(C2_ccombinewt,"if (Pu4) Rdd32=combine(Rs32,Rt32)",ATTRIBS(A_ARCHV2),
253 "Conditionally combine two words into a register pair",
260 Q6INSN(C2_ccombinewf,"if (!Pu4) Rdd32=combine(Rs32,Rt32)",ATTRIBS(A_ARCHV2),
261 "Conditionally combine two words into a register pair",
H A Dalu.idef266 Q6INSN(A2_combinew,"Rdd32=combine(Rs32,Rt32)",ATTRIBS(),
267 "Combine two words into a register pair",
272 Q6INSN(A4_combineri,"Rdd32=combine(Rs32,#s8)",ATTRIBS(),
273 "Combine a word and an immediate into a register pair",
278 Q6INSN(A4_combineir,"Rdd32=combine(#s8,Rs32)",ATTRIBS(),
279 "Combine a word and an immediate into a register pair",
286 Q6INSN(A2_combineii,"Rdd32=combine(#s8,#S8)",ATTRIBS(A_ARCHV2),
290 Q6INSN(A4_combineii,"Rdd32=combine(#s8,#U6)",ATTRIBS(),"Set two small immediates",
294 Q6INSN(A2_combine_hh,"Rd32=combine(Rt.H32,Rs.H32)",ATTRIBS(),
295 "Combine two halves into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(1,RsV);})
[all …]
/qemu/include/exec/
H A Dmemopidx.h2 * Combine the MemOp and mmu_idx parameters into a single value.
/qemu/include/libdecnumber/
H A Ddconfig.h18 into a combine executable.)
H A DdecContext.h19 into a combine executable.)
H A DdecNumber.h19 into a combine executable.)
/qemu/include/libdecnumber/dpd/
H A Ddecimal128Local.h18 into a combine executable.)
H A Ddecimal128.h19 into a combine executable.)
H A Ddecimal64.h19 into a combine executable.)
H A Ddecimal32.h19 into a combine executable.)
/qemu/python/
H A DMakefile119 @coverage combine
/qemu/hw/intc/
H A Darm_gicv3_its_common.c114 /* Our two regions are always adjacent, therefore we now combine them in gicv3_its_init_mmio()
/qemu/docs/system/
H A Dsecrets.rst128 the serial number ``1729``. It is possible to combine use of the keyring with
/qemu/hw/usb/
H A Dxlnx-versal-usb2-ctrl-regs.c86 * May be combine both the modules. in ir_status_postw()
/qemu/target/arm/
H A Dptw.c2995 * Combine either inner or outer cacheability attributes for normal
3021 * Combine the memory type and cacheability attributes of
3041 /* Combine memory type and cacheability attributes */ in combined_attrs_nofwb()
3057 /* Outer/inner cacheability combine independently */ in combined_attrs_nofwb()
3085 * Combine the memory type and cacheability attributes of
3129 * Combine S1 and S2 cacheability/shareability attributes, per D4.5.4
3150 /* Combine shareability attributes (table D4-43) */ in combine_cacheattrs()
3162 /* Combine memory type and cacheability attributes */ in combine_cacheattrs()
3322 /* Combine the S1 and S2 perms. */ in get_phys_addr_twostage()
3348 /* Combine the S1 and S2 cache attributes. */ in get_phys_addr_twostage()
/qemu/target/i386/tcg/system/
H A Dexcp_helper.c307 /* combine pde and pte nx, user and rw protections */ in mmu_translate()
351 /* combine pde and pte user and rw protections */ in mmu_translate()
/qemu/docs/devel/
H A Dlockcnt.rst221 If an object has to be freed right after a visit, you can combine
H A Drcu.rst265 is possible to combine this idiom with a "real" reference count::
/qemu/roms/
H A DMakefile51 # We need that to combine multiple images (legacy bios,
/qemu/docs/system/arm/
H A Dxlnx-versal-virt.rst5 (System on Chip) that combine traditional hardened CPUs and I/O
/qemu/target/s390x/
H A Dcpu_models_system.c328 /* combine the results */ in qmp_query_cpu_model_comparison()
/qemu/tests/tcg/hexagon/
H A Dv69_hvx.c238 * Combine into v13:12 as .tmp, then use it in the next packet in test_vcombine_tmp()
/qemu/tests/qtest/
H A Dendianness-test.c301 path = g_strdup_printf("endianness/combine/%s", in main()
/qemu/hw/block/
H A Dpflash_cfi01.c339 * If we have a read larger than the bank_width, combine multiple in pflash_read()
367 * If we have a read larger than the bank_width, combine multiple in pflash_read()

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