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Searched full:clkc (Results 1 – 8 of 8) sorted by relevance

/linux-3.3/arch/frv/kernel/
Dpm.c216 unsigned long flags, clkc; in try_set_p0() local
226 clkc = __get_CLKC(); in try_set_p0()
228 clkc |= CLKC_P0; in try_set_p0()
230 clkc &= ~CLKC_P0; in try_set_p0()
231 __set_CLKC(clkc); in try_set_p0()
246 unsigned long flags, clkc; in try_set_cm() local
256 clkc = __get_CLKC(); in try_set_cm()
257 clkc &= ~CLKC_CM; in try_set_cm()
258 clkc |= new_cm; in try_set_cm()
259 __set_CLKC(clkc); in try_set_cm()
Dlocal.h40 #define CLOCK_BIT_CM_H 0x00000001 /* CLKC.CM can be set to 0 */
41 #define CLOCK_BIT_CM_M 0x00000002 /* CLKC.CM can be set to 1 */
42 #define CLOCK_BIT_CM_L 0x00000004 /* CLKC.CM can be set to 2 */
43 #define CLOCK_BIT_P0 0x00000010 /* CLKC.P0 can be changed */
44 #define CLOCK_BIT_CMODE 0x00000020 /* CLKC.CMODE can be changed */
Dsetup.c526 unsigned long clkc, psr, quot; in determine_clocks() local
528 clkc = __get_CLKC(); in determine_clocks()
531 clock_p0_current = !!(clkc & CLKC_P0); in determine_clocks()
532 clock_cm_current = clkc & CLKC_CM; in determine_clocks()
533 clock_cmode_current = (clkc & CLKC_CMODE) >> CLKC_CMODE_s; in determine_clocks()
536 printk("psr=%08lx hsr0=%08lx clkc=%08lx\n", psr, __get_HSR(0), clkc); in determine_clocks()
572 tmode = &clock_cmodes[(clkc & CLKC_CMODE) >> CLKC_CMODE_s]; in determine_clocks()
586 switch (clkc & CLKC_CM) { in determine_clocks()
597 printk("Unsupported CLKC CM %ld\n", clkc & CLKC_CM); in determine_clocks()
602 if (clkc & CLKC_P0) in determine_clocks()
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Dsleep.S158 # Set the clock mode (CLKC register) as required.
159 # - At this time, also set the CLKC register P0 bit.
339 # (6) Set the clock mode (CLKC register) as required.
340 # - At this time, also set the CLKC register P0 bit.
Dcmode.S140 # (12) Set '1' to the CLKC.SWEN bit. In that case, do not change
141 # fields other than SWEN of the CLKC register.
/linux-3.3/Documentation/frv/
Dclock.txt4 The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock
9 p0 -- current value of the P0 bit in CLKC register.
10 cm -- current value of the CM bits in CLKC register.
11 cmode -- current value of the CMODE bits in CLKC register.
/linux-3.3/arch/arm/mach-prima2/
Dclock.c483 { .compatible = "sirf,prima2-clkc" },
498 panic("unable to find compatible clkc node in dtb\n"); in sirfsoc_of_clk_init()
501 panic("unable to find clkc range in dtb"); in sirfsoc_of_clk_init()
/linux-3.3/arch/arm/boot/dts/
Dprima2-cb.dts64 compatible = "sirf,prima2-clkc";