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/linux-5.10/arch/mips/boot/dts/img/
Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dqca,ar803x.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
18 - $ref: ethernet-phy.yaml#
21 qca,clk-out-frequency:
26 qca,clk-out-strength:
27 description: Clock output driver strength.
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/linux-5.10/drivers/mtd/nand/raw/
Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
8 #include <linux/clk.h>
10 #include <linux/dma-mapping.h>
31 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
37 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
38 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
153 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
171 struct clk *clk; member
204 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
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Dmtk_ecc.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
12 #include <linux/clk.h>
58 struct clk *clk; member
67 /* ecc strength that each IP supports */
121 struct device *dev = ecc->dev; in mtk_ecc_wait_idle()
125 ret = readl_poll_timeout_atomic(ecc->regs + ECC_IDLE_REG(op), val, in mtk_ecc_wait_idle()
138 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
141 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
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Dmtk_nand.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
13 #include <linux/clk.h>
90 #define MTK_NAME "mtk-nand"
139 struct clk *nfi_clk;
140 struct clk *pad_clk;
146 struct mtk_nfc_clk clk; member
186 return (u8 *)p + i * chip->ecc.size; in data_ptr()
198 if (i < mtk_nand->bad_mark.sec) in oob_ptr()
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Dmeson_nand.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 #include <linux/dma-mapping.h>
12 #include <linux/clk.h>
76 #define ECC_CHECK_RETURN_FF (-1)
126 u32 strength; member
152 struct clk *core_clk;
153 struct clk *device_clk;
154 struct clk *phase_tx;
155 struct clk *phase_rx;
188 #define MESON_ECC_DATA(b, s) { .bch = (b), .strength = (s)}
[all …]
Dtango_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk.h>
13 #include <linux/dma-mapping.h>
16 /* Offsets relative to chip->base */
110 #define PKT_CFG(size, strength) ((size) << 16 | (strength)) argument
118 struct tango_nfc *nfc = to_tango_nfc(chip->controller); in tango_select_target()
121 writel_relaxed(tchip->timing1, nfc->reg_base + NFC_TIMING1); in tango_select_target()
122 writel_relaxed(tchip->timing2, nfc->reg_base + NFC_TIMING2); in tango_select_target()
123 writel_relaxed(tchip->xfer_cfg, nfc->reg_base + NFC_XFER_CFG); in tango_select_target()
124 writel_relaxed(tchip->pkt_0_cfg, nfc->reg_base + NFC_PKT_0_CFG); in tango_select_target()
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Dstm32_fmc2_nand.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk.h>
10 #include <linux/dma-mapping.h>
255 struct clk *clk; member
281 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()
283 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
287 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
289 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
290 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
293 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
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Dvf610_nfc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2009-2015 Freescale Semiconductor, Inc. and others
15 * - Untested on MPC5125 and M54418.
16 * - DMA and pipelining not used.
17 * - 2K pages or less.
18 * - HW ECC: Only 2K page with 64+ OOB.
19 * - HW ECC: Only 24 and 32-bit error correction implemented.
24 #include <linux/clk.h>
66 #define COMMAND_NADDR_BYTES(x) GENMASK(13, 13 - (x) + 1)
135 * ECC status - seems to consume 8 bytes (double word). The documented
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/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a-kontron-sl28-var4.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
14 #include <dt-bindings/net/qca-ar803x.h>
17 model = "Kontron SMARC-sAL28 (Dual PHY)";
18 compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
22 phy-handle = <&phy1>;
23 phy-connection-type = "rgmii-id";
27 #address-cells = <1>;
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/linux-5.10/arch/arm/boot/dts/
Dqcom-msm8974-sony-xperia-honami.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
3 #include "qcom-pm8841.dtsi"
4 #include "qcom-pm8941.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-honami", "qcom,msm8974";
18 stdout-path = "serial0:115200n8";
21 gpio-keys {
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Dqcom-msm8974-sony-xperia-amami.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
3 #include "qcom-pm8841.dtsi"
4 #include "qcom-pm8941.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-amami", "qcom,msm8974";
18 stdout-path = "serial0:115200n8";
21 gpio-keys {
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Dqcom-apq8060-dragonboard.dts19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
27 #include "qcom-msm8660.dtsi"
31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
38 stdout-path = "serial0:115200n8";
42 compatible = "simple-bus";
45 vph: regulator-fixed {
[all …]
Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
[all …]
Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/linux-5.10/drivers/mtd/nand/raw/atmel/
Dnand-controller.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
23 * Derived from Das U-Boot source code
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
38 * - atmel_nand_: all generic structures/functions
39 * - atmel_smc_nand_: all structures/functions specific to the SMC interface
41 * - atmel_hsmc_nand_: all structures/functions specific to the HSMC interface
43 * - atmel_nfc_: all structures/functions used to manipulate the NFC sub-block
45 * - <soc>_nand_: all SoC specific structures/functions
48 #include <linux/clk.h>
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/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
/linux-5.10/drivers/mtd/nand/raw/gpmi-nand/
Dgpmi-nand.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
8 #include <linux/clk.h>
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
96 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
[all …]
/linux-5.10/drivers/net/phy/
Dat803x.c1 // SPDX-License-Identifier: GPL-2.0+
22 #include <dt-bindings/net/qca-ar803x.h>
86 #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
221 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
222 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
223 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
224 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
225 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
226 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
233 phy_write(phydev, MII_BMCR, context->bmcr); in at803x_context_restore()
[all …]
/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
/linux-5.10/drivers/mtd/nand/raw/ingenic/
Djz4780_bch.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk.h>
68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_reset()
71 reg = params->size << BCH_BHCNT_BLOCKSIZE_SHIFT; in jz4780_bch_reset()
72 reg |= params->bytes << BCH_BHCNT_PARITYSIZE_SHIFT; in jz4780_bch_reset()
73 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_reset()
77 reg |= params->strength << BCH_BHCR_BSEL_SHIFT; in jz4780_bch_reset()
80 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_reset()
85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable()
86 writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR); in jz4780_bch_disable()
[all …]
/linux-5.10/drivers/mmc/host/
Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
13 #include <linux/clk.h>
23 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-pltfm.h"
101 * drive strength.
149 struct clk *tmclk;
176 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
178 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
184 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
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