/linux/Documentation/devicetree/bindings/clock/ |
H A D | ti,cdce925.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexander Stein <alexander.stein@ew.tq-group.com> 15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913 16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925 17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937 18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949 23 - ti,cdce913 24 - ti,cdce925 [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | x1p42100-asus-zenbook-a14.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. 7 /dts-v1/; 10 #include "x1-asus-zenbook-a14.dtsi" 12 /delete-node/ &pmc8380_6; 13 /delete-node/ &pmc8380_6_thermal; 17 compatible = "asus,zenbook-a14-ux3407qa", "qcom,x1p42100"; 19 wcn6855-pmu { 20 compatible = "qcom,wcn6855-pmu"; 22 vddaon-supply = <&vreg_wcn_0p95>; [all …]
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H A D | qcs6490-rb3gen2-vision-mezzanine.dtso | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 10 /dts-v1/; 13 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 14 #include <dt-bindings/gpio/gpio.h> 17 vdda-phy-supply = <&vreg_l10c_0p88>; 18 vdda-pll-supply = <&vreg_l6b_1p2>; 23 #address-cells = <1>; 24 #size-cells = <0>; 31 clock-lanes = <7>; [all …]
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H A D | sc7280-herobrine-villager-r1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 9 #include "sc7280-herobrine-villager.dtsi" 10 #include "sc7280-herobrine-audio-wcd9385.dtsi" 13 vdd-micb-supply = <&pp1800_l2c>; 17 audio-routing = 22 "VA DMIC0", "vdd-micb", 23 "VA DMIC1", "vdd-micb", 24 "VA DMIC2", "vdd-micb", 25 "VA DMIC3", "vdd-micb",
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H A D | qcs8550-aim300-aiot.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include "qcs8550-aim300.dtsi" 16 compatible = "qcom,qcs8550-aim300-aiot", "qcom,qcs8550-aim300", "qcom,qcs8550", 24 stdout-path = "serial0:115200n8"; 27 gpio-keys { 28 compatible = "gpio-keys"; 30 pinctrl-0 = <&volume_up_n>; [all …]
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H A D | sc7280-crd-r3.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "sc7280-idp.dtsi" 11 #include "sc7280-idp-ec-h1.dtsi" 14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)"; 15 compatible = "qcom,sc7280-crd", 16 "google,hoglin-rev3", "google,hoglin-rev4", 17 "google,piglin-rev3", "google,piglin-rev4", 25 stdout-path = "serial0:115200n8"; [all …]
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H A D | ipq9574-rdp-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 22 stdout-path = "serial0:115200n8"; 26 compatible = "regulator-fixed"; 27 regulator-min-microvolt = <3300000>; [all …]
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H A D | qcs615-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 5 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 14 compatible = "qcom,qcs615-ride", "qcom,qcs615"; 15 chassis-type = "embedded"; 24 stdout-path = "serial0:115200n8"; 28 sleep_clk: sleep-clk { [all …]
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H A D | sdx75-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 compatible = "qcom,sdx75-idp", "qcom,sdx75"; 22 vph_pwr: vph-pwr-regulator { 23 compatible = "regulator-fixed"; 24 regulator-name = "vph_pwr"; 25 regulator-min-microvolt = <3700000>; 26 regulator-max-microvolt = <3700000>; [all …]
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H A D | ipq5332-rdp468.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; 16 regulator_fixed_5p0: regulator-s0500 { 17 compatible = "regulator-fixed"; 18 regulator-min-microvolt = <500000>; 19 regulator-max-microvolt = <500000>; 20 regulator-boot-on; [all …]
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H A D | qru1000-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 14 compatible = "qcom,qru1000-idp", "qcom,qru1000"; 15 chassis-type = "embedded"; 22 stdout-path = "serial0:115200n8"; 25 ppvar_sys: ppvar-sys-regulator { 26 compatible = "regulator-fixed"; 27 regulator-name = "ppvar_sys"; [all …]
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H A D | qcs8550-aim300.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 regulators-0 { 17 compatible = "qcom,pm8550-rpmh-regulators"; 18 qcom,pmic-id = "b"; 20 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>; 21 vdd-l2-l13-l14-supply = <&vreg_bob1>; 22 vdd-l3-supply = <&vreg_s4g_1p25>; 23 vdd-l5-l16-supply = <&vreg_bob1>; [all …]
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H A D | qcs8300-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include "qcs8300-pmics.dtsi" 15 compatible = "qcom,qcs8300-ride", "qcom,qcs8300"; 16 chassis-type = "embedded"; 23 stdout-path = "serial0:115200n8"; 26 regulator-usb2-vbus { [all …]
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H A D | qdu1000-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 14 compatible = "qcom,qdu1000-idp", "qcom,qdu1000"; 15 chassis-type = "embedded"; 22 stdout-path = "serial0:115200n8"; 25 ppvar_sys: ppvar-sys-regulator { 26 compatible = "regulator-fixed"; 27 regulator-name = "ppvar_sys"; [all …]
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H A D | qcm6490-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 12 #include <dt-bindings/input/linux-event-codes.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 22 /delete-node/ &ipa_fw_mem; 23 /delete-node/ &rmtfs_mem; 24 /delete-node/ &adsp_mem; [all …]
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H A D | x1e80100-asus-vivobook-s15.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 #include "x1e80100-pmics.dtsi" 19 compatible = "asus,vivobook-s15", "qcom,x1e80100"; 20 chassis-type = "laptop"; [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 26 clock-names: 28 - const: dmc_clk 30 operating-points-v2: true [all …]
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-sdx65-mtp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 5 /dts-v1/; 11 #include "qcom-sdx65.dtsi" 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 19 compatible = "qcom,sdx65-mtp", "qcom,sdx65"; 20 qcom,board-id = <0x2010008 0x302>; 27 stdout-path = "serial0:115200n8"; 30 reserved-memory { 31 #address-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-gru-scarlet.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-scarlet board device tree source 8 #include "rk3399-gru.dtsi" 11 chassis-type = "tablet"; 16 pp1250_s3: regulator-pp1250-s3 { 17 compatible = "regulator-fixed"; 18 regulator-name = "pp1250_s3"; 21 regulator-always-on; 22 regulator-boot-on; 23 regulator-min-microvolt = <1250000>; [all …]
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H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: regulator-pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; 19 regulator-max-microvolt = <900000>; [all …]
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H A D | rk3399-pinebook-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/linux-event-codes.h> 11 #include <dt-bindings/pwm/pwm.h> 12 #include <dt-bindings/usb/pd.h> 13 #include <dt-bindings/leds/common.h> 18 compatible = "pine64,pinebook-pro", "rockchip,rk3399"; 19 chassis-type = "laptop"; 28 stdout-path = "serial2:1500000n8"; [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | qcom,pcie-sc7280.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 19 const: qcom,pcie-sc7280 25 reg-names: 28 - const: parf # Qualcomm specific registers 29 - const: dbi # DesignWare PCIe registers [all …]
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/linux/arch/arm64/boot/dts/renesas/ |
H A D | beacon-renesom-baseboard.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/versaclock.h> 11 backlight_lvds: backlight-lvds { 12 compatible = "pwm-backlight"; 13 power-supply = <®_lcd>; 14 enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>; 16 brightness-levels = <0 4 8 16 32 64 128 255>; 17 default-brightness-level = <6>; [all …]
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-m31-eusb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 107 { .supply = "vdd" }, 108 { .supply = "vdda12" }, 143 return -EINVAL; in m31eusb2_phy_write_readback() 157 dev_dbg(&phy->phy->dev, "Offset:%x BitMask:%x Value:%x", in m31eusb2_phy_write_sequence() 158 tbl->off, tbl->mask, tbl->val); in m31eusb2_phy_write_sequence() 160 ret = m31eusb2_phy_write_readback(phy->base, in m31eusb2_phy_write_sequence() 161 tbl->off, tbl->mask, in m31eusb2_phy_write_sequence() 162 tbl->val << __ffs(tbl->mask)); in m31eusb2_phy_write_sequence() [all …]
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/linux/drivers/iio/adc/ |
H A D | hi8435.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Holt Integrated Circuits HI-8435 threshold detector driver 22 /* Register offsets for HI-8435 */ 48 unsigned threshold_lo[2]; /* GND-Open and Supply-Open thresholds */ 49 unsigned threshold_hi[2]; /* GND-Open and Supply-Open thresholds */ 56 return spi_write_then_read(priv->spi, ®, 1, val, 1); in hi8435_readb() 65 ret = spi_write_then_read(priv->spi, ®, 1, &be_val, 2); in hi8435_readw() 77 ret = spi_write_then_read(priv->spi, ®, 1, &be_val, 4); in hi8435_readl() 85 priv->reg_buffer[0] = reg | HI8435_WRITE_OPCODE; in hi8435_writeb() 86 priv->reg_buffer[1] = val; in hi8435_writeb() [all …]
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