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162 * @seq_12_event: event causing the transition from 1 to 2.163 * @seq_21_event: event causing the transition from 2 to 1.164 * @seq_23_event: event causing the transition from 2 to 3.165 * @seq_31_event: event causing the transition from 3 to 1.166 * @seq_32_event: event causing the transition from 3 to 2.167 * @seq_13_event: event causing the transition from 1 to 3.
67 …h shared status and requests exclusive access in the Level 1 data cache, causing a coherence acces…71 … "This event counts demand access that misses in the Level 1 data cache, causing an access to outs…
90 …us and requests exclusive access in the Level 1 data and Level 2 caches, causing a coherence acces…118 …counts demand access that misses in the Level 1 data and Level 2 caches, causing an access to outs…
80 … architecturally executed branches that were taken and were mispredicted causing a pipeline flush."88 …hitecturally executed branches that were not taken and were mispredicted causing a pipeline flush."
93 … moved from an active state to an inactive state (long-term sleep state, causing deallocation of s…96 … moved from an active state to an inactive state (long-term sleep state, causing deallocation of s…
3 * even if there's nothing to export - causing empty <uapi/asm/setup.h>
12 * there. This avoids wrapping the counter and causing 'spurious'
19 a patch, causing calls to patched functions to be redirected
9 # causing Kbuild to rebuild the vdso-offsets header file every time.
80 * but have the downside of causing extra105 * causing extra overhead. If this command is
26 overflows to be caught immediately rather than causing difficult to65 immediately rather than causing difficult-to-diagnose corruption.
62 #define IOMMU_AFSR_SIZE 0x0e000000 /* Size of transaction causing error */84 #define IOMMU_MFSR_C 0x00000800 /* Address causing error was marked cacheable */
27 addiu k0, 4 # skip the causing instruction
19 * potentially causing hardware damage.
13 # Clang stores addresses on the stack causing the frame size to blow
12 * At some point that was causing issues due to legacy logic of treating such
94 may help clean up any residual config items which could be causing problems.97 Doing so should allow you to determine if UML is causing the issue you're
13 prlog "Causing kernel crash ..."
15 * cache before the transfer is done, causing old data to be seen by