| /linux-5.10/net/mac80211/ |
| D | Kconfig | 126 Selecting this option causes mac80211 to print out
137 Selecting this option causes mac80211 to print out
148 Selecting this option causes mac80211 to print out
169 Selecting this option causes mac80211 to print out
180 Selecting this option causes mac80211 to print out
191 Selecting this option causes mac80211 to print out very
204 Selecting this option causes mac80211 to print out very
217 Selecting this option causes mac80211 to print out very
230 Selecting this option causes mac80211 to print out very
243 Selecting this option causes mac80211 to print out very verbose mesh
[all …]
|
| /linux-5.10/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/ |
| D | cache.json | 15 …event counts any load or store operation or page table walk access which causes data to be read fr…
21 …. In particular, any access which could count the L1D_CACHE_REFILL event causes this event to coun…
51 … cache refill. This event counts any cacheable transaction from L1 which causes data to be read fr…
111 …hat caused a page table walk. This event counts on any data access which causes L2D_TLB_REFILL to …
117 …sed a page table walk. This event counts on any instruction access which causes L2D_TLB_REFILL to …
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | virtual-memory.json | 15 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
25 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
35 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
44 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
107 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
114 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
215 "PublicDescription": "Misses in ITLB that causes a page walk of any page size.",
222 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
232 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
242 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/haswell/ |
| D | virtual-memory.json | 19 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
29 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
38 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
48 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
102 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
118 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
210 "PublicDescription": "Misses in ITLB that causes a page walk of any page size.",
226 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
236 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
245 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | virtual-memory.json | 9 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of an…
18 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
28 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
60 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
70 …"PublicDescription": "Miss in all TLB levels causes a page walk that completes of any page size (4…
|
| /linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-light-tsl2772 | 5 Causes an internal calibration of the als gain trim
12 Causes a recalculation and adjustment to the
|
| D | sysfs-bus-coresight-devices-etm3x | 177 Description: (RW) Defines the event that causes the sequencer to transition
184 Description: (RW) Defines the event that causes the sequencer to transition
191 Description: (RW) Defines the event that causes the sequencer to transition
198 Description: (RW) Defines the event that causes the sequencer to transition
205 Description: (RW) Defines the event that causes the sequencer to transition
212 Description: (RW) Defines the event that causes the sequencer to transition
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | virtual-memory.json | 16 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
27 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
38 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
49 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
108 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
210 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
221 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
232 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | virtual-memory.json | 21 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
32 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
43 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
53 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
113 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
215 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
226 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
237 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | virtual-memory.json | 16 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
27 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
38 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
49 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
108 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
210 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
221 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
232 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
|
| /linux-5.10/Documentation/input/devices/ |
| D | atarikbd.rst | 206 DISABLE) then causes port 0 to again be scanned as if it were a mouse, and
227 Any byte following an 0x80 command byte other than 0x01 is ignored (and causes
233 The RESET command or function causes the ikbd to perform a simple self-test.
248 ; mss=0xy, mouse button press or release causes mouse
250 ; where y=1, mouse key press causes absolute report
251 ; and x=1, mouse key release causes absolute report
383 mouse motion. This causes mouse motion toward the user to be negative in sign
395 This causes mouse motion toward the user to be positive in sign and away from
406 its output has been paused also causes an implicit RESUME this command can be
440 causes any accumulated motion to be immediately queued as packets, if the
[all …]
|
| /linux-5.10/Documentation/powerpc/ |
| D | eeh-pci-error-recovery.rst | 34 Causes of EEH Errors
43 The most common software bug, is one that causes the device to
49 years. Other possible causes of EEH errors include data or
178 This last call causes the device driver for the card to be stopped,
179 which causes uevents to go out to user space. This triggers
306 - A minor complaint is that resetting the network card causes
312 causes havoc to mounted file systems. Scripts cannot post-facto
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/ |
| D | virtual-memory.json | 9 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of an…
19 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
42 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
52 …"PublicDescription": "Miss in all TLB levels causes a page walk that completes of any page size (4…
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/icelake/ |
| D | virtual-memory.json | 33 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
100 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
145 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)"
156 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)"
167 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
|
| /linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dprtc.c | 85 * Each interrupt can have up to 32 causes. The enable/disable control's the
86 * overall interrupt state. if the interrupt is disabled no causes will cause
158 * Every interrupt can have up to 32 causes and the interrupt model supports
190 * Every interrupt can have up to 32 causes and the interrupt model supports
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | virtual-memory.json | 42 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
144 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
154 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
174 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
184 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
265 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | virtual-memory.json | 23 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
175 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
195 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
205 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
234 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
244 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/skylake/ |
| D | virtual-memory.json | 49 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
130 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
191 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
201 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
211 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
221 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
|
| /linux-5.10/Documentation/admin-guide/cgroup-v1/ |
| D | hugetlb.rst | 89 enforced at reservation time (on mmap or shget), reservation limits never causes
97 never causes the application to get SIGBUS signal if the memory was reserved
109 to the first task that causes the memory to be reserved or faulted, and all
|
| /linux-5.10/fs/fscache/ |
| D | Kconfig | 17 This option causes statistical information to be gathered on local
34 This option causes latency information to be gathered on local
|
| /linux-5.10/drivers/fsi/ |
| D | Kconfig | 20 This option causes char devices created for FSI devices to be
24 Additionally, it also causes the char device names to be offset
|
| /linux-5.10/drivers/gpu/drm/panfrost/ |
| D | panfrost_issues.h | 23 /* Write of PRFCNT_CONFIG_MODE_MANUAL to PRFCNT_CONFIG causes a
44 * Cache Flush, Tiler) jobs causes DATA_INVALID_FAULT on tiler job. */
50 /* Change in RMUs in use causes problems related with the core's SDC */
|
| /linux-5.10/Documentation/admin-guide/pm/ |
| D | sleep-states.rst | 137 the boot loader, depending on the system configuration, but anyway it causes
164 by the kernel. Writing one of these strings into it causes the kernel
188 Writing one of the listed strings into this file causes the system
235 Writing one of the strings listed above into this file causes the option
253 possible. In particular, writing '0' to this file causes the size of
|
| /linux-5.10/drivers/net/wireless/intel/iwlwifi/pcie/ |
| D | internal.h | 281 * @IWL_SHARED_IRQ_NON_RX: interrupt vector serves non rx causes.
363 * @shared_vec_mask: the type of causes the shared vector handles
366 * @def_irq: default irq for non rx causes
367 * @fh_init_mask: initial unmasked fh causes
368 * @hw_init_mask: initial unmasked hw causes
369 * @fh_mask: current unmasked fh causes
370 * @hw_mask: current unmasked hw causes
647 * fh/hw_mask keeps all the unmasked causes. in _iwl_enable_interrupts()
719 * Leave all the FH causes enabled to get the ALIVE in iwl_enable_fw_load_int_ctx_info()
|
| /linux-5.10/arch/x86/kernel/ |
| D | reboot_fixups_32.c | 20 /* writing 1 to the reset control register, 0x44 causes the in cs5530a_warm_reset()
29 /* writing 1 to the LSB of this MSR causes a hard reset */ in cs5536_warm_reset()
|