Searched full:cascaded (Results 1 – 25 of 113) sorted by relevance
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| /linux-5.10/drivers/staging/comedi/drivers/ |
| D | comedi_8254.h | 66 * @osc_base: cascaded oscillator speed in ns
68 * @divisor1: divisor loaded into first cascaded counter
69 * @divisor2: divisor loaded into second cascaded counter
71 * @next_div1: next divisor to use for first cascaded counter
72 * @next_div2: next divisor to use for second cascaded counter
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| D | comedi_8254.c | 75 * provided to handle the cascaded counters:
89 * Programs the mode of the cascaded counters and writes the current
100 * counters that are used for the cascaded 32-bit pacer.
298 * comedi_8254_pacer_enable - set the mode and load the cascaded counters
335 * comedi_8254_update_divisors - update the divisors for the cascaded counters
348 * comedi_8254_cascade_ns_to_timer - calculate the cascaded divisor values
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| /linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 35 may be cascaded into the core interrupt controller. The megamodule PIC
38 interrupt sources, individual megamodule interrupts may be cascaded to
39 the core interrupt controller. When an individual interrupt is cascaded,
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| D | arm,versatile-fpga-irq.txt | 34 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
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| D | nxp,lpc3220-mic.txt | 17 - interrupts: empty for MIC interrupt controller, cascaded MIC
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| /linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | twl-family.txt | 17 it is considered as an interrupt controller cascaded to the SoC one.
34 interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */
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| D | twl4030-audio.txt | 32 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| D | twl4030-power.txt | 40 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| /linux-5.10/Documentation/driver-api/gpio/ |
| D | driver.rst | 258 most often cascaded off a parent interrupt controller, and in some special
280 - CASCADED INTERRUPT CHIPS: this means that the GPIO chip has one common
309 Cascaded GPIO irqchips
312 Cascaded GPIO irqchips usually fall in one of three categories:
314 - CHAINED CASCADED GPIO IRQCHIPS: these are usually the type that is embedded on
419 is a typical example of a cascaded interrupt handler using gpio_irq_chip:
499 - DEPRECATED: gpiochip_irqchip_add(): adds a chained cascaded irqchip to a
505 - gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip,
506 as discussed above regarding different types of cascaded irqchips. The
507 cascaded irq has to be handled by a threaded interrupt handler.
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| /linux-5.10/arch/powerpc/platforms/52xx/ |
| D | media5200.c | 13 * a cascaded interrupt controller driver which attaches itself to the
84 /* Mask off the cascaded IRQ */ in media5200_irq_cascade()
164 pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq); in media5200_init_irq()
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| /linux-5.10/arch/m68k/include/asm/ |
| D | macints.h | 106 /* Nubus interrupts (cascaded to VIA2) */
115 /* Baboon interrupts (cascaded to nubus slot $C) */
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| /linux-5.10/arch/powerpc/platforms/powermac/ |
| D | pic.c | 299 /* We might have a second cascaded ohare */ in pmac_pic_probe_oldstyle()
306 /* We might have a second cascaded heathrow */ in pmac_pic_probe_oldstyle()
351 /* Map interrupts of cascaded controller */ in pmac_pic_probe_oldstyle()
476 /* We can have up to 2 MPICs cascaded */ in pmac_pic_probe_mpic()
511 /* Set up a cascaded controller, if present */ in pmac_pic_probe_mpic()
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| /linux-5.10/arch/xtensa/platforms/xt2000/include/platform/ |
| D | hardware.h | 31 /* The XT2000 uses the V3 as a cascaded interrupt controller for the PCI bus */
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| /linux-5.10/arch/arm/boot/dts/ |
| D | omap4-duovero.dtsi | 168 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
175 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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| D | omap4-var-som-om44.dtsi | 176 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
188 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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| D | omap2430-sdp.dts | 24 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| D | omap3-cm-t3x30.dtsi | 69 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| D | am3517-craneboard.dts | 86 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| /linux-5.10/drivers/irqchip/ |
| D | irq-bcm2835.c | 18 * In a proper cascaded interrupt controller, the interrupt lines with
19 * cascaded interrupt controllers on them are just normal interrupt lines.
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| D | irq-goldfish-pic.c | 20 /* 8..39 Cascaded Goldfish PIC interrupts */
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| /linux-5.10/arch/hexagon/kernel/ |
| D | irq_cpu.c | 58 * controllers that are cascaded into one or more of the first-level
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| /linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | 8xxx_gpio.txt | 16 The GPIO module may serve as another interrupt controller (cascaded to
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| /linux-5.10/arch/mips/include/asm/ |
| D | i8259.h | 68 * Interrupt is cascaded so perform interrupt in i8259_irq()
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| /linux-5.10/arch/mips/dec/ |
| D | ioasic-irq.c | 82 * ASIC is cascaded to, are level-triggered it is recommended that error
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| /linux-5.10/arch/powerpc/sysdev/ |
| D | tsi108_pci.c | 354 * Interrupt controller descriptor for cascaded PCI interrupt controller.
399 * PCI block has to be treated as a cascaded interrupt controller connected
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