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/linux-6.15/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml7 title: Calxeda AHCI SATA Controller
10 The Calxeda SATA controller mostly conforms to the AHCI interface
19 const: calxeda,hb-ahci
29 calxeda,pre-clocks:
35 calxeda,post-clocks:
41 calxeda,led-order:
47 calxeda,port-phys:
57 calxeda,tx-atten:
65 calxeda,sgpio-gpio:
82 compatible = "calxeda,hb-ahci";
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Dcalxeda.yaml4 $id: http://devicetree.org/schemas/clock/calxeda.yaml#
7 title: Calxeda highbank platform Clock Controller
10 This binding covers the Calxeda SoC internal peripheral and bus clocks
24 - calxeda,hb-pll-clock
25 - calxeda,hb-a9periph-clock
26 - calxeda,hb-a9bus-clock
27 - calxeda,hb-emmc-clock
46 compatible = "calxeda,hb-sregs";
61 compatible = "calxeda,hb-pll-clock";
68 compatible = "calxeda,hb-pll-clock";
[all …]
/linux-6.15/arch/arm/boot/dts/calxeda/
Decx-common.dtsi3 * Copyright 2011-2012 Calxeda, Inc.
26 compatible = "calxeda,hb-ahci";
30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
33 calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>,
35 calxeda,led-order = <4 0 1 2 3>;
39 compatible = "calxeda,hb-sdhci";
132 compatible = "calxeda,hb-sregs";
147 compatible = "calxeda,hb-pll-clock";
154 compatible = "calxeda,hb-pll-clock";
161 compatible = "calxeda,hb-a9periph-clock";
[all …]
Dhighbank.dts3 * Copyright 2011-2012 Calxeda, Inc.
12 model = "Calxeda Highbank";
13 compatible = "calxeda,highbank";
108 compatible = "calxeda,hb-ddr-ctrl";
150 compatible = "calxeda,hb-sregs-l2-ecc";
Decx-2000.dts3 * Copyright 2011-2012 Calxeda, Inc.
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
77 compatible = "calxeda,ecx-2000-ddr-ctrl";
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/
Dcalxeda-ddr-ctrlr.yaml4 $id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#
7 title: Calxeda DDR memory controller
10 The Calxeda DDR memory controller is initialised and programmed by the
20 - calxeda,hb-ddr-ctrl
21 - calxeda,ecx-2000-ddr-ctrl
39 compatible = "calxeda,hb-ddr-ctrl";
/linux-6.15/Documentation/devicetree/bindings/arm/
Dcalxeda.yaml4 $id: http://devicetree.org/schemas/arm/calxeda.yaml#
7 title: Calxeda Platforms
12 Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
21 - calxeda,highbank
22 - calxeda,ecx-2000
/linux-6.15/drivers/cpufreq/
Dhighbank-cpufreq.c3 * Copyright (C) 2012 Calxeda, Inc.
66 if ((!of_machine_is_compatible("calxeda,highbank")) && in hb_cpufreq_driver_init()
67 (!of_machine_is_compatible("calxeda,ecx-2000"))) in hb_cpufreq_driver_init()
105 { .compatible = "calxeda,highbank" },
106 { .compatible = "calxeda,ecx-2000" },
111 MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@calxeda.com>");
112 MODULE_DESCRIPTION("Calxeda Highbank cpufreq driver");
/linux-6.15/Documentation/devicetree/bindings/arm/calxeda/
Dl2ecc.yaml4 $id: http://devicetree.org/schemas/arm/calxeda/l2ecc.yaml#
7 title: Calxeda Highbank L2 cache ECC
10 Binding for the Calxeda Highbank L2 cache controller ECC device.
19 const: calxeda,hb-sregs-l2-ecc
39 compatible = "calxeda,hb-sregs-l2-ecc";
Dhb-sregs.yaml4 $id: http://devicetree.org/schemas/arm/calxeda/hb-sregs.yaml#
7 title: Calxeda Highbank system registers
10 The Calxeda Highbank system has a block of MMIO registers controlling
19 const: calxeda,hb-sregs
36 compatible = "calxeda,hb-sregs";
/linux-6.15/arch/arm/mach-highbank/
Dhighbank.c3 * Copyright 2010-2011 Calxeda, Inc.
78 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) in highbank_platform_notifier()
80 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) in highbank_platform_notifier()
84 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { in highbank_platform_notifier()
116 .name = "cpuidle-calxeda",
142 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); in highbank_init()
159 "calxeda,highbank",
160 "calxeda,ecx-2000",
DKconfig3 bool "Calxeda ECX-1000/2000 (Highbank/Midway)"
Dsystem.c3 * Copyright 2011 Calxeda, Inc.
Dsmc.S4 * Copyright 2012 Calxeda, Inc.
/linux-6.15/Documentation/devicetree/bindings/phy/
Dcalxeda-combophy.yaml4 $id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
7 title: Calxeda Highbank Combination PHYs for SATA
10 The Calxeda Combination PHYs connect the SoC to the internal fabric
22 const: calxeda,hb-combophy
46 compatible = "calxeda,hb-combophy";
/linux-6.15/Documentation/devicetree/bindings/net/
Dcalxeda-xgmac.yaml4 $id: http://devicetree.org/schemas/net/calxeda-xgmac.yaml#
7 title: Calxeda Highbank 10Gb XGMAC Ethernet controller
10 The Calxeda XGMAC Ethernet controllers are directly connected to the
21 const: calxeda,hb-xgmac
46 compatible = "calxeda,hb-xgmac";
/linux-6.15/drivers/vfio/platform/reset/
Dvfio_platform_calxedaxgmac.c3 * VFIO platform driver specialized for Calxeda xgmac reset
4 * reset code is inherited from calxeda xgmac native driver
6 * Copyright 2010-2011 Calxeda, Inc.
20 #define DRIVER_DESC "Reset support for Calxeda xgmac vfio platform device"
69 module_vfio_reset_handler("calxeda,hb-xgmac", vfio_platform_calxedaxgmac_reset);
DKconfig4 tristate "VFIO support for calxeda xgmac reset"
6 Enables the VFIO platform driver to handle reset for Calxeda xgmac
/linux-6.15/drivers/ata/
Dsata_highbank.c3 * Calxeda Highbank AHCI SATA platform driver
4 * Copyright 2012 Calxeda, Inc.
188 gpiod = devm_gpiod_get_index(dev, "calxeda,sgpio", i, in highbank_set_em_messages()
198 of_property_read_u32_array(np, "calxeda,led-order", in highbank_set_em_messages()
201 if (of_property_read_u32(np, "calxeda,pre-clocks", &pdata->pre_clocks)) in highbank_set_em_messages()
203 if (of_property_read_u32(np, "calxeda,post-clocks", in highbank_set_em_messages()
340 "calxeda,port-phys", "#phy-cells", in highbank_initialize_phys()
363 of_property_read_u32_array(sata_node, "calxeda,tx-atten", in highbank_initialize_phys()
371 * The Calxeda SATA phy intermittently fails to bring up a link with Gen3
447 { .compatible = "calxeda,hb-ahci" },
[all …]
/linux-6.15/drivers/cpuidle/
Dcpuidle-calxeda.c3 * Copyright 2012 Calxeda, Inc.
9 * Maintainer: Rob Herring <rob.herring@calxeda.com>
68 .name = "cpuidle-calxeda",
DKconfig.arm66 bool "CPU Idle Driver for Calxeda processors"
70 Select this to enable cpuidle on Calxeda processors.
/linux-6.15/drivers/clk/
Dclk-highbank.c3 * Copyright 2011-2012 Calxeda, Inc.
281 srnp = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); in hb_clk_init()
310 CLK_OF_DECLARE(hb_pll, "calxeda,hb-pll-clock", hb_pll_init);
316 CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init);
322 CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init);
328 CLK_OF_DECLARE(hb_emmc, "calxeda,hb-emmc-clock", hb_emmc_init);
/linux-6.15/drivers/edac/
Dhighbank_l2_edac.c3 * Copyright 2011-2012 Calxeda, Inc.
43 { .compatible = "calxeda,hb-sregs-l2-ecc", },
141 MODULE_AUTHOR("Calxeda, Inc.");
142 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");
Dhighbank_mc_edac.c3 * Copyright 2011-2012 Calxeda, Inc.
139 { .compatible = "calxeda,hb-ddr-ctrl", .data = &hb_settings },
140 { .compatible = "calxeda,ecx-2000-ddr-ctrl", .data = &mw_settings },
274 MODULE_AUTHOR("Calxeda, Inc.");
275 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank");
/linux-6.15/drivers/net/ethernet/calxeda/
DKconfig3 tristate "Calxeda 1G/10G XGMAC Ethernet driver"
8 This is the driver for the XGMAC Ethernet IP block found on Calxeda

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