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/kvm-unit-tests/lib/
H A Dalloc_phys.c19 phys_addr_t base; member
27 static phys_addr_t base, top; variable
45 (u64)regions[i].base, in phys_alloc_show()
46 (u64)(regions[i].base + regions[i].size - 1), in phys_alloc_show()
49 (u64)base, (u64)(top - 1), "FREE"); in phys_alloc_show()
56 base = base_addr; in phys_alloc_init()
57 top = base + size; in phys_alloc_init()
84 assert(base < top_safe); in phys_alloc_aligned_safe()
88 addr = ALIGN(base, align); in phys_alloc_aligned_safe()
89 size += addr - base; in phys_alloc_aligned_safe()
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H A Dvirtio-mmio.c25 p[i] = readb(vm_dev->base + VIRTIO_MMIO_CONFIG + offset + i); in vm_get()
36 writeb(p[i], vm_dev->base + VIRTIO_MMIO_CONFIG + offset + i); in vm_set()
42 writel(vq->index, vm_dev->base + VIRTIO_MMIO_QUEUE_NOTIFY); in vm_notify()
61 writel(index, vm_dev->base + VIRTIO_MMIO_QUEUE_SEL); in vm_setup_vq()
63 assert(readl(vm_dev->base + VIRTIO_MMIO_QUEUE_NUM_MAX) >= num); in vm_setup_vq()
65 if (readl(vm_dev->base + VIRTIO_MMIO_QUEUE_PFN) != 0) { in vm_setup_vq()
66 printf("%s: virtqueue %d already setup! base=%p\n", in vm_setup_vq()
67 __func__, index, vm_dev->base); in vm_setup_vq()
71 writel(num, vm_dev->base + VIRTIO_MMIO_QUEUE_NUM); in vm_setup_vq()
73 vm_dev->base + VIRTIO_MMIO_QUEUE_ALIGN); in vm_setup_vq()
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H A Dstring.c182 int base, bool is_signed, bool is_longlong) in __strtoll() argument
188 assert(base == 0 || (base >= 2 && base <= 36)); in __strtoll()
202 if (base == 0 || base == 16) { in __strtoll()
207 base = 16; in __strtoll()
208 } else if (base == 0) in __strtoll()
209 base = 8; in __strtoll()
210 } else if (base == 0) in __strtoll()
211 base = 10; in __strtoll()
215 if (*s >= '0' && *s < '0' + base && *s <= '9') in __strtoll()
217 else if (*s >= 'a' && *s < 'a' + base - 10) in __strtoll()
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H A Dstdlib.h10 long int strtol(const char *nptr, char **endptr, int base);
11 unsigned long int strtoul(const char *nptr, char **endptr, int base);
12 long long int strtoll(const char *nptr, char **endptr, int base);
13 unsigned long long int strtoull(const char *nptr, char **endptr, int base);
H A Dalloc_phys.h22 * at @base. The minimum alignment is set to DEFAULT_MINIMUM_ALIGNMENT.
24 extern void phys_alloc_init(phys_addr_t base, phys_addr_t size);
41 * passed to phys_alloc_init, returning the newly allocated memory's base
42 * and top addresses. phys_alloc_get_unused will still return base and top
43 * when no free memory is remaining, but base will equal top.
H A Dvmalloc.c216 phys_addr_t base, top; in __setup_vm() local
223 phys_alloc_get_unused(&base, &top); in __setup_vm()
224 assert(base != top || page_alloc_initialized()); in __setup_vm()
230 base = PAGE_ALIGN(base) >> PAGE_SHIFT; in __setup_vm()
232 page_alloc_init_area(AREA_ANY_NUMBER, base, top); in __setup_vm()
237 phys_alloc_get_unused(&base, &top); in __setup_vm()
239 if (base != top) { in __setup_vm()
240 base = PAGE_ALIGN(base) >> PAGE_SHIFT; in __setup_vm()
242 page_alloc_init_area(AREA_ANY_NUMBER, base, top); in __setup_vm()
H A Delf.h11 /* 32-bit ELF base types. */
16 /* 64-bit ELF base types. */
54 #define R_X86_64_RELATIVE 8 /* Adjust by program base */
H A Dalloc_page.c40 pfn_t base; member
82 return (pfn >= a->base) && (pfn < a->top); in usable_area_contains_pfn()
105 idx = pfn - a->base; in split()
163 idx = virt_to_pfn(p) - a->base; in page_memalign_order()
189 p = pfn_to_virt(a->base + idx); in page_memalign_order()
231 first = pfn - a->base; in coalesce()
232 second = pfn2 - a->base; in coalesce()
281 p = pfn - a->base; in _free_pages()
335 i = pfn - a->base; in _reserve_one_page()
353 i = pfn - a->base; in _unreserve_one_page()
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H A Dpci-host-generic.c57 struct dt_pbus_reg base; in pci_dt_probe() local
94 ret = dt_pbus_get_base(&dt_dev, &base); in pci_dt_probe()
108 assert(bus_max < base.size / (1 << PCI_ECAM_BUS_SHIFT)); in pci_dt_probe()
125 host->start = ioremap(base.addr, base.size); in pci_dt_probe()
126 host->size = base.size; in pci_dt_probe()
H A Ddevicetree.h110 * dt_pbus_translate(dev, 0, base)
116 struct dt_pbus_reg *base) in dt_pbus_get_base() argument
118 return dt_pbus_translate(dev, 0, base); in dt_pbus_get_base()
151 * tuple (the base) using the processor bus translation, and finally it
152 * stores that result in @base.
158 struct dt_pbus_reg *base);
H A Dprintf.c159 static void print_int(pstream_t *ps, long long n, int base, strprops_t props) in print_int() argument
170 *p++ = digits[n % base]; in print_int()
171 n /= base; in print_int()
194 static void print_unsigned(pstream_t *ps, unsigned long long n, int base, in print_unsigned() argument
201 *p++ = digits[n % base]; in print_unsigned()
202 n /= base; in print_unsigned()
212 if (props.alternate && base == 16) { in print_unsigned()
/kvm-unit-tests/lib/libfdt/
H A Dfdt_overlay.c45 * @fdt: Base device tree blob
50 * overlay_get_target() retrieves the target offset in the base
55 * the targeted node offset in the base device tree
104 * @fdt: Base device tree blob
150 * phandles to not conflict with the overlays of the base device tree.
187 * phandles to not conflict with the overlays of the base device tree.
214 * with the ones from the base device tree before merging them.
315 * delta to not conflict with the base overlay.
319 * with the ones from the base device tree before merging them.
346 * overlay_fixup_one_phandle - Set an overlay phandle to the base one
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/kvm-unit-tests/lib/arm/
H A Dio.c23 * Use this guess for the uart base in order to make an attempt at
25 * base address that we read from the device tree later. This is
37 * the TX register at offset 0 from the base address, so there is no in uart0_init_fdt()
41 struct dt_pbus_reg base; in uart0_init_fdt() local
50 ret = dt_pbus_get_base_compatible(compatible[i], &base); in uart0_init_fdt()
67 ret = dt_pbus_translate_node(ret, 0, &base); in uart0_init_fdt()
71 uart0_base = ioremap(base.addr, base.size); in uart0_init_fdt()
103 "Found uart at %p, but early base is %p.\n", in io_init()
H A Dgic.c112 &gicv3_data.redist_bases[0], &its_data.base); in gicv3_init()
223 its_data.base = ioremap(its_entry->base_address, ACPI_GICV3_ITS_MEM_SIZE - 1); in gicv3_acpi_parse_madt_its()
316 void *base; in gic_irq_set_clr_enable() local
323 base = gicv2_dist_base(); in gic_irq_set_clr_enable()
328 base = gicv3_sgi_base(); in gic_irq_set_clr_enable()
331 base = gicv3_dist_base(); in gic_irq_set_clr_enable()
337 base += offset + (irq / split) * 4; in gic_irq_set_clr_enable()
338 writel(BIT(shift), base); in gic_irq_set_clr_enable()
H A Dsetup.c142 phys_addr_t base, top; in mem_allocator_init() local
150 phys_alloc_get_unused(&base, &top); in mem_allocator_init()
151 base = PAGE_ALIGN(base); in mem_allocator_init()
153 assert(sizeof(long) == 8 || !(base >> 32)); in mem_allocator_init()
156 page_alloc_init_area(0, base >> PAGE_SHIFT, top >> PAGE_SHIFT); in mem_allocator_init()
/kvm-unit-tests/lib/riscv/
H A Dio.c21 * Use this guess for the uart base in order to make an attempt at
23 * base address that we read from the device tree later. This is
62 struct dt_pbus_reg base; in uart0_init_fdt() local
70 ret = dt_pbus_get_base_compatible(compatible[i], &base); in uart0_init_fdt()
93 ret = dt_pbus_translate_node(ret, 0, &base); in uart0_init_fdt()
97 uart0_base = ioremap(base.addr, base.size); in uart0_init_fdt()
114 "Found uart at %p, but early base is %p.\n", in io_init()
H A Dsbi.c157 unsigned long base = ULONG_MAX; in sbi_send_ipi_cpumask() local
162 if (base > cpus[cpu].hartid) in sbi_send_ipi_cpumask()
163 base = cpus[cpu].hartid; in sbi_send_ipi_cpumask()
167 if (cpus[cpu].hartid < base + BITS_PER_LONG) { in sbi_send_ipi_cpumask()
168 mask |= 1UL << (cpus[cpu].hartid - base); in sbi_send_ipi_cpumask()
173 ret = sbi_send_ipi(mask, base); in sbi_send_ipi_cpumask()
H A Dstack.c11 unsigned long base = (unsigned long)&ImageBase; in base_address() local
18 *addr = ra - base; in base_address()
/kvm-unit-tests/lib/powerpc/asm/
H A Dppc_asm.h7 #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) argument
8 #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) argument
/kvm-unit-tests/x86/
H A Dkvmclock.c56 # define do_div(n,base) ({ \ argument
57 u32 __base = (base); \
64 u32 __attribute__((weak)) __div64_32(u64 *n, u32 base);
65 u32 __attribute__((weak)) __div64_32(u64 *n, u32 base) in __div64_32() argument
68 u64 b = base; in __div64_32()
74 if (high >= base) { in __div64_32()
75 high /= base; in __div64_32()
77 rem -= (u64) (high*base) << 32; in __div64_32()
98 # define do_div(n,base) ({ \ argument
99 u32 __base = (base); \
H A Dla57.c23 * Note: value for LDT and TSS base might not reflect the actual base in get_test_register_value()
24 * that the CPU currently uses, because the (hidden) base value can't be in get_test_register_value()
30 return dt_ptr.base; in get_test_register_value()
33 return dt_ptr.base; in get_test_register_value()
61 dt_ptr.base = value; in set_test_register_value()
74 dt_ptr.base = value; in set_test_register_value()
/kvm-unit-tests/lib/x86/
H A Ddesc.c15 .base = (unsigned long)boot_idt,
52 .base = (unsigned long)gdt,
341 void set_gdt_entry_base(int sel, unsigned long base) in set_gdt_entry_base() argument
345 /* Setup the descriptor base address */ in set_gdt_entry_base()
346 entry->base1 = (base & 0xFFFF); in set_gdt_entry_base()
347 entry->base2 = (base >> 16) & 0xFF; in set_gdt_entry_base()
348 entry->base3 = (base >> 24) & 0xFF; in set_gdt_entry_base()
354 entry16->base4 = base >> 32; in set_gdt_entry_base()
359 void set_gdt_entry(int sel, unsigned long base, u32 limit, u8 type, u8 flags) in set_gdt_entry() argument
366 set_gdt_entry_base(sel, base); in set_gdt_entry()
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/kvm-unit-tests/lib/ppc64/
H A Dopal.c13 uint64_t base; member
28 prop = fdt_get_property(dt_fdt(), node, "opal-base-address", &len); in opal_init()
31 opal.base = fdt64_to_cpu(*(uint64_t *)prop->data); in opal_init()
/kvm-unit-tests/lib/arm64/
H A Dgic-v3-its.c77 writeq(cbaser, its_data.base + GITS_CBASER); in its_cmd_queue_init()
80 writeq(0, its_data.base + GITS_CWRITER); in its_cmd_queue_init()
85 if (!its_data.base) in its_init()
110 writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR); in its_enable_defaults()
/kvm-unit-tests/lib/s390x/
H A Dsclp.c38 phys_addr_t base, top; in mem_init() local
41 phys_alloc_get_unused(&base, &top); in mem_init()
42 base = PAGE_ALIGN(base) >> PAGE_SHIFT; in mem_init()
46 page_alloc_init_area(AREA_ANY_NUMBER, base, top); in mem_init()

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