architected (full) in projects: linux-5.10

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/linux-5.10/Documentation/devicetree/bindings/timer/
D	arm,arch_timer.yaml	`7 title: ARM architected timer 13 ARM cores may have a per-core architected timer, which provides per-cpu timers, 14 or a memory mapped architected timer, which provides up to 8 frames with a 17 The per-core architected timer is attached to a GIC to deliver its 78 supported for 32-bit systems which follow the ARMv7 architected reset`
D	arm,arch_timer_mmio.yaml	`7 title: ARM memory mapped architected timer 14 ARM cores may have a memory mapped architected timer, which provides up to 8 52 supported for 32-bit systems which follow the ARMv7 architected reset`
/linux-5.10/arch/arm/mach-bcm/
D	Kconfig	`10 comment "IPROC architected SoCs" 24 This enables support for systems based on Broadcom IPROC architected SoCs. 89 comment "KONA architected SoCs"`
/linux-5.10/Documentation/arm64/
D	booting.rst	`184 System caches which respect the architected cache maintenance by VA 186 System caches which do not respect architected cache maintenance by VA 189 - Architected timers 205 All writable architected system registers at the exception level where 273 The requirements described above for CPU mode, caches, MMUs, architected`
D	amu.rst	`39 The Activity Monitors architecture provides space for up to 16 architected 41 implement additional architected event counters.`
D	elf_hwcaps.rst	`13 architected discovery mechanism available to userspace code at EL0. The 44 which are described by architected ID registers inaccessible to`
/linux-5.10/arch/ia64/include/uapi/asm/
D	perfmon.h	`171 * miscellaneous architected definitions 174 #define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers / 175 #define PMU_MAX_PMDS 256 / maximum architected number of PMD registers */`
/linux-5.10/arch/arm/kernel/
D	arch_timer.c	`26 /* Use the architected timer for the delay loop. */ in arch_timer_delay_timer_register()`
/linux-5.10/arch/ia64/kernel/
D	sigframe.h	`18 * End of architected state.`
/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/
D	cache.json	404 … of the event that counts load uops with true STLB miss retired to the architected path. True STLB… 416 …EBS) of the event that counts store uops true STLB miss retired to the architected path. True STLB… 430 …uses PEBS) of the event that counts load uops with locked access retired to the architected path.", 442 … PEBS) of the event that counts line-splitted load uops retired to the architected path. A line sp… 454 …PEBS) of the event that counts line-splitted store uops retired to the architected path. A line sp… 467 …(that is, uses PEBS) of the event that counts load uops retired to the architected path with a fil… 479 …that is, uses PEBS) of the event that counts store uops retired to the architected path with a fil…
/linux-5.10/arch/arm64/kernel/
D	jump_label.c	`33 * We use the architected A64 NOP in arch_static_branch, so there's no in arch_jump_label_transform_static()`
D	time.c	`65 panic("Unable to initialise architected timer.\n"); in time_init()`
/linux-5.10/arch/alpha/include/asm/
D	hwrpb.h	`9 * These values are architected. 31 * These values are architected.`
/linux-5.10/drivers/parisc/
D	gsc.h	`18 /* PA I/O Architected devices support at least 5 bits in the EIM register. */`
/linux-5.10/arch/parisc/kernel/
D	jump_label.c	`50 * We use the architected NOP in arch_static_branch, so there's no in arch_jump_label_transform_static()`
/linux-5.10/arch/arm/mach-rockchip/
D	rockchip.c	`33 * which is needed for the architected timer to work. in rockchip_timer_init()`
/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/
D	cache.json	404 …tion": "This event counts load uops with true STLB miss retired to the architected path. True STLB… 416 …ion": "This event counts store uops with true STLB miss retired to the architected path. True STLB… 430 …licDescription": "This event counts load uops with locked access retired to the architected path.", 442 …"PublicDescription": "This event counts line-splitted load uops retired to the architected path. A… 454 …"PublicDescription": "This event counts line-splitted store uops retired to the architected path. … 467 …"PublicDescription": "This event counts load uops retired to the architected path with a filter on… 479 …"PublicDescription": "This event counts store uops retired to the architected path with a filter o…
/linux-5.10/arch/powerpc/kernel/
D	cputable.c	319 { /* 2.05-compliant processor, i.e. Power6 "architected" mode / 322 .cpu_name = "POWER6 (architected)", 332 { / 2.06-compliant processor, i.e. Power7 "architected" mode / 335 .cpu_name = "POWER7 (architected)", 349 { / 2.07-compliant processor, i.e. Power8 "architected" mode / 352 .cpu_name = "POWER8 (architected)", 366 { / 3.00-compliant processor, i.e. Power9 "architected" mode / 369 .cpu_name = "POWER9 (architected)", 382 { / 3.1-compliant processor, i.e. Power10 "architected" mode */ 385 .cpu_name = "POWER10 (architected)",
/linux-5.10/Documentation/admin-guide/perf/
D	xgene-pmu.rst	`7 controller(s). These PMU devices are loosely architected to follow the`
/linux-5.10/arch/powerpc/include/asm/nohash/
D	pte-book3e.h	`12 /* Architected bits */`
/linux-5.10/drivers/clocksource/
D	Kconfig	`329 bool "Enable ARM architected timer event stream generation by default" 334 based on the ARM architected timer. It is used for waking up CPUs`
/linux-5.10/tools/testing/selftests/powerpc/vphn/asm/
D	lppaca.h	`120 * We are using a non architected field to determine if a partition is`
/linux-5.10/arch/powerpc/include/asm/
D	lppaca.h	`120 * We are using a non architected field to determine if a partition is`
/linux-5.10/arch/alpha/include/uapi/asm/
D	fpu.h	`38 * floating-point enable bit (which is architected). On top of that,`
/linux-5.10/include/scsi/
D	viosrp.h	`16 /* between partitions. The definitions in this file are architected, */`

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