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Searched +full:ar9132 +full:- +full:pll (Results 1 – 5 of 5) sorted by relevance

/src/sys/contrib/device-tree/src/mips/qca/
H A Dar9132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
5 compatible = "qca,ar9132";
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
17 clocks = <&pll ATH79_CLK_CPU>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
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H A Dar9132_tl_wr1043nd_v1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
7 #include "ar9132.dtsi"
10 compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
11 model = "TP-Link TL-WR1043ND Version 1";
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <40000000>;
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/src/sys/contrib/device-tree/Bindings/clock/
H A Dqca,ath79-pll.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qca,ath79-pll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros ATH79 PLL controller
10 - Alban Bedel <albeu@free.fr>
11 - Antony Pavlov <antonynpavlov@gmail.com>
14 The PLL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.
19 - items:
20 - const: qca,ar9132-pll
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H A Dqca,ath79-pll.txt1 Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
6 - compatible: has to be "qca,<soctype>-pll" and one of the following
8 - "qca,ar7100-pll"
9 - "qca,ar7240-pll"
10 - "qca,ar9130-pll"
11 - "qca,ar9330-pll"
12 - "qca,ar9340-pll"
13 - "qca,qca9550-pll"
14 - reg: Base address and size of the controllers memory area
15 - clock-names: Name of the input clock, has to be "ref"
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/src/sys/contrib/device-tree/Bindings/spi/
H A Dspi-ath79.txt4 - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
5 - reg: Base address and size of the controllers memory area
6 - clocks: phandle of the AHB clock.
7 - clock-names: has to be "ahb".
8 - #address-cells: <1>, as required by generic SPI binding.
9 - #size-cells: <0>, also as required by generic SPI binding.
16 compatible = "qca,ar9132-spi", "qca,ar7100-spi";
19 clocks = <&pll 2>;
20 clock-names = "ahb";
22 #address-cells = <1>;
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