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/qemu/tests/functional/
H A Dtest_aarch64_xen.py3 # Functional test that boots a Xen hypervisor with a domU kernel and
/qemu/hw/ssi/
H A Dnpcm7xx_fiu.c6 * This program is free software; you can redistribute it and/or modify it
85 /* Command Mode Lock and the bits protected by it. */
310 /* Use bytes 0 and 1 first, then keep repeating byte 2 */ in send_dummy_bits()
/qemu/tests/unit/
H A Dtest-util-sockets.c6 * This program is free software; you can redistribute it and/or modify
69 * granularity. To replace monitor_get_fd() and monitor_cur(), we
71 * the binary and would be taken from the same stub object file,
H A Dtest-crypto-cipher.c6 * This library is free software; you can redistribute it and/or
155 * in single AES block, and gives identical
156 * ciphertext in ECB and CBC modes
/qemu/hw/rtc/
H A Dexynos4210_rtc.c7 * This program is free software; you can redistribute it and/or modify it
214 /* month is between 0 and 11. */
519 * Set default values to timer fields and registers
/qemu/scripts/codeconverter/codeconverter/
H A Dpatching.py106 """Sanity check match, and print warnings if necessary"""
144 return other.start() >= self.start() and other.end() <= self.end()
321 """Return line and column for a match object inside original_content"""
/qemu/qga/vss-win32/
H A Dinstall.cpp122 "SID='S-1-5-32-544' and localAccount=TRUE"), in GetAdminName()
170 /* Fall through and free psid */ in getNameByStringSID()
180 /* Find and iterate QGA VSS provider in COM+ Application Catalog */
/qemu/hw/xen/
H A Dxen-hvm-common.c290 * and accesses to undesired parts of guest memory, which is up in rw_phys_req_item()
598 * guest resumes and does a hlt with interrupts disabled which in cpu_handle_ioreq()
682 * Attempt to map using the resource API and fall back to normal in xen_map_ioreq_server()
714 * to provide the addresses to map the shared page and/or to get the in xen_map_ioreq_server()
H A Dxen_pt.c23 * - Set machine_irq and assigned_device->machine_irq to '0'.
316 /* adjust the read and write value to appropriate CFC-CFF window */ in xen_pt_pci_write_config()
408 xen_pt_log(d, "(unsafe) and if it helps report the problem to xen-devel\n"); in xen_pt_pci_write_config()
544 * device. The io_region to check is provided with (addr, size and type)
545 * A callback can be provided and will be called for every region that is
/qemu/target/mips/
H A Dcpu.c6 * This library is free software; you can redistribute it and/or
263 * Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR in mips_cpu_reset_hold()
274 /* For MIPS64, init FR bit to 1 if FPU unit is there and bit is writable. */ in mips_cpu_reset_hold()
416 /* UHI interface can be used to obtain argc and argv */ in mips_cpu_reset_hold()
/qemu/hw/pci-host/
H A Dbonito.c18 * what is the meaning of devfn in qemu and IDSEL in bonito northbridge?
21 * one pci bus can have 32 devices and each device can have 8 functions.
505 /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ in bonito_spciconf_write()
533 /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ in bonito_spciconf_read()
H A Dpnv_phb3.c359 * TX and RX so we enable if both are set in pnv_phb3_remap_irqs()
371 /* Grab global one and compare */ in pnv_phb3_remap_irqs()
632 /* Set lock and return previous value */ in pnv_phb3_reg_read()
759 * TODO: Venice/Murano support it on bottom window above 4G and in pnv_phb3_translate_tve()
906 * The handler handles both MSI and MSIX.
/qemu/include/tcg/
H A Dtcg-op-common.h44 * See also tcg.h and the block comment above TB_EXIT_MASK.
47 * be NULL and @idx should be 0. Otherwise, @tb should be valid and
62 * are always invalidated properly, and direct jumps are reset when mapping
/qemu/target/ppc/
H A Dinsn64.decode2 # Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1)
6 # This library is free software; you can redistribute it and/or
20 # Format MLS:D and 8LS:D
121 ### Float-Point Load and Store Instructions
/qemu/hw/i386/
H A Dintel_iommu_internal.h8 * This program is free software; you can redistribute it and/or modify
293 * Read(R) and Write(W) or Execute(E) field is Set.
502 /* Pagesize of VTD paging structures, including root and context tables */
598 /* Common for both First Level and Second Level */
/qemu/semihosting/
H A Dsyscalls.c535 * Since this is only used by xtensa in system mode, and stdio is in host_poll_one()
536 * handled through GuestFDConsole, and there are no semihosting in host_poll_one()
537 * system calls for sockets and the like, that means this descriptor in host_poll_one()
538 * must be a normal file. Normal files never block and are thus in host_poll_one()
/qemu/target/hexagon/
H A Dtranslate.c4 * This program is free software; you can redistribute it and/or modify
276 * USR is used to set overflow and FP exceptions, in mark_implicit_reg_write()
482 /* Preload the predicated HVX registers into future_VRegs and tmp_VRegs */ in gen_start_packet()
692 * slot 1 and then slot 0. This will be important when in process_store_log()
812 * ahead and process that first. in gen_commit_packet()
/qemu/io/
H A Dchannel-websock.c6 * This library is free software; you can redistribute it and/or
353 /* hash and encode it */ in qio_channel_websock_handshake_send_res_ok()
728 * * Only binary and ping/pong encoding is supported. in qio_channel_websock_decode_header()
744 "ping, and pong websocket frames are supported", opcode); in qio_channel_websock_decode_header()
747 "only binary, close, ping, and pong frames are supported"); in qio_channel_websock_decode_header()
/qemu/hw/display/
H A Dxenfb.c14 * This program is free software; you can redistribute it and/or modify
457 * pd[1] of the 32bit struct layout and the lower in xenfb_map_fb()
630 * uses something else we must convert and copy, otherwise we can
631 * supply the buffer directly and no thing here.
932 * instead. This releases the guest pages and keeps qemu happy. in fb_disconnect()
H A Dvirtio-gpu-virgl.c130 * and thus, making the data pointer invalid, we will block virtio-gpu in virtio_gpu_virgl_map_resource_blob()
131 * command processing until MR is fully unreferenced and freed. in virtio_gpu_virgl_map_resource_blob()
160 * and suspend/block cmd processing. in virtio_gpu_virgl_unmap_resource_blob()
161 * 2. Wait for res->mr to be freed and cmd processing resumed in virtio_gpu_virgl_unmap_resource_blob()
182 /* memory region owns self res->mr object and frees it by itself */ in virtio_gpu_virgl_unmap_resource_blob()
H A Dexynos4210_fimd.c11 * This program is free software; you can redistribute it and/or modify it
255 /* Palette memory aliases for windows 0 and 1 */
373 * example, if blue component has only two possible values 0 and 1 it will be
374 * extended to 0 and 0xFF */
585 * registers, BLENDCON register and window's WINCON register */
685 /* It is possible that blending equation parameters a and b do not in exynos4210_fimd_blend_pixel()
842 DEF_DRAW_LINE_NOPALETTE(8) /* 8bpp mode has palette and non-palette versions */
1122 * VIDOSDA, VIDOSDB, VIDWADDx and SHADOWCON registers */
1144 /* TODO: add .exit and unref the region there. Not needed yet since sysbus in fimd_update_memory_section()
1673 /* Palette memory aliases for windows 0 and 1 */ in exynos4210_fimd_write()
/qemu/hw/sparc/
H A Dsun4m.c7 * of this software and associated documentation files (the "Software"), to deal
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
13 * The above copyright notice and this permission notice shall be included in
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
845 /* Create and map RAM frontend */ in sun4m_hw_init()
/qemu/hw/net/
H A Dftgmac100.c92 * DMA burst length and arbitration control register
215 * Receive and transmit Buffer Descriptor
658 * This is purely informative. The HW can poll the RW (and RX) ring
719 /* and the PHY */ in ftgmac100_do_reset()
890 case FTGMAC100_DBLAC: /* DMA Burst Length and Arbitration Control */ in ftgmac100_write()
913 case FTGMAC100_TPAFCR: /* Transmit Priority Arbitration and FIFO Control */ in ftgmac100_write()
/qemu/hw/arm/
H A Dvirt-acpi-build.c1 /* Support for generating ACPI tables and passing them to Guests
15 * This program is free software; you can redistribute it and/or modify
278 * node and do not pass through the SMMU, by subtracting the SMMU-bound in create_rc_its_idmaps()
338 nb_nodes = 2; /* RC and SMMUv3 */ in build_iort()
353 nb_nodes = 2; /* RC and ITS */ in build_iort()
606 * set only "Timer interrupt Mode" and assume "Timer Interrupt in build_gtdt()
/qemu/target/i386/nvmm/
H A Dnvmm-all.c112 /* RIP and RFLAGS. */ in nvmm_set_registers()
264 /* RIP and RFLAGS. */ in nvmm_get_registers()
384 * thread, and synchronize the guest TPR.
468 * Called after the VCPU ran. We synchronize the host view of the TPR and
880 * and another thread signaling the vCPU thread to exit.
1063 /* Adjust start_pa and size so that they are page-aligned. */ in nvmm_process_section()

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