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/linux/Documentation/devicetree/bindings/edac/
H A Daltr,socfpga-ecc-manager.yaml5 $id: http://devicetree.org/schemas/edac/altr,socfpga-ecc-manager.yaml#
23 - const: altr,socfpga-s10-ecc-manager
24 - const: altr,socfpga-a10-ecc-manager
25 - const: altr,socfpga-a10-ecc-manager
26 - const: altr,socfpga-ecc-manager
45 altr,sysmgr-syscon:
56 - altr,sdram-edac
57 - altr,sdram-edac-a10
58 - altr,sdram-edac-s10
64 altr,sdr-syscon:
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/linux/Documentation/devicetree/bindings/nios2/
H A Dnios2.txt11 - compatible: Compatible property value should be "altr,nios2-1.0".
21 - altr,pid-num-bits: Specifies the number of bits to use to represent the process
23 - altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB.
24 - altr,tlb-num-entries: Specifies the number of entries in the TLB.
25 - altr,tlb-ptr-sz: Specifies size of TLB pointer.
26 - altr,has-mul: Specifies CPU hardware multiply support, should be 1.
27 - altr,has-mmu: Specifies CPU support MMU support, should be 1.
28 - altr,has-initda: Specifies CPU support initda instruction, should be 1.
29 - altr,reset-addr: Specifies CPU reset address
30 - altr,fast-tlb-miss-addr: Specifies CPU fast TLB miss exception address
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/linux/arch/nios2/boot/dts/
H A D10m50_devboard.dts10 compatible = "altr,niosii-max10";
20 compatible = "altr,nios2-1.1";
24 altr,exception-addr = <0xc8000120>;
25 altr,fast-tlb-miss-addr = <0xc0000100>;
26 altr,has-div = <1>;
27 altr,has-initda = <1>;
28 altr,has-mmu = <1>;
29 altr,has-mul = <1>;
30 altr,implementation = "fast";
31 altr,pid-num-bits = <8>;
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H A D3c120_devboard.dts11 model = "altr,qsys_ghrd_3c120";
12 compatible = "altr,qsys_ghrd_3c120";
22 compatible = "altr,nios2-1.0";
31 altr,implementation = "fast";
32 altr,pid-num-bits = <8>;
33 altr,tlb-num-ways = <16>;
34 altr,tlb-num-entries = <128>;
35 altr,tlb-ptr-sz = <7>;
36 altr,has-div = <1>;
37 altr,has-mul = <1>;
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/linux/Documentation/devicetree/bindings/arm/
H A Daltera.yaml23 - altr,socfpga-arria5-socdk
24 - const: altr,socfpga-arria5
25 - const: altr,socfpga
30 - altr,socfpga-arria10-socdk
31 - const: altr,socfpga-arria10
32 - const: altr,socfpga
42 - const: altr,socfpga-arria10
43 - const: altr,socfpga
48 - altr,socfpga-cyclone5-socdk
57 - const: altr,socfpga-cyclone5
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/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
16 enable-method = "altr,socfpga-a10-smp";
93 compatible = "altr,clk-mgr";
124 compatible = "altr,socfpga-a10-pll-clock";
131 compatible = "altr,socfpga-a10-perip-clk";
138 compatible = "altr,socfpga-a10-perip-clk";
145 compatible = "altr,socfpga-a10-perip-clk";
152 compatible = "altr,socfpga-a10-perip-clk";
159 compatible = "altr,socfpga-a10-perip-clk";
166 compatible = "altr,socfpga-a10-perip-clk";
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H A Dsocfpga.dtsi6 #include <dt-bindings/reset/altr,rst-mgr.h>
24 enable-method = "altr,socfpga-smp";
118 compatible = "altr,clk-mgr";
149 compatible = "altr,socfpga-pll-clock";
155 compatible = "altr,socfpga-perip-clk";
163 compatible = "altr,socfpga-perip-clk";
171 compatible = "altr,socfpga-perip-clk";
179 compatible = "altr,socfpga-perip-clk";
186 compatible = "altr,socfpga-perip-clk";
193 compatible = "altr,socfpga-perip-clk";
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H A Dsocfpga_arria10_socdk.dtsi9 compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
105 compatible = "altr,a10sr";
115 compatible = "altr,a10sr-gpio";
121 compatible = "altr,a10sr-reset";
/linux/Documentation/devicetree/bindings/net/
H A Daltr,tse.yaml4 $id: http://devicetree.org/schemas/net/altr,tse.yaml#
15 - const: altr,tse-1.0
16 - const: ALTR,tse-1.0
18 - const: altr,tse-msgdma-1.0
38 altr,has-supplementary-unicast:
43 altr,has-hash-multicast-filter:
56 const: altr,tse-mdio
75 - altr,tse-1.0
76 - ALTR,tse-1.0
93 - altr,tse-msgdma-1.0
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H A Daltr,socfpga-stmmac.yaml4 $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml#
24 - altr,socfpga-stmmac
25 - altr,socfpga-stmmac-a10-s10
26 - altr,socfpga-stmmac-agilex5
35 - const: altr,socfpga-stmmac
39 - const: altr,socfpga-stmmac-a10-s10
43 - const: altr,socfpga-stmmac-a10-s10
47 - const: altr,socfpga-stmmac-agilex5
111 altr,emac-splitter:
117 altr,f2h_ptp_ref_clk:
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/linux/Documentation/devicetree/bindings/arm/altera/
H A Dsocfpga-clk-manager.yaml20 - const: altr,clk-mgr
48 - altr,socfpga-pll-clock
49 - altr,socfpga-perip-clk
50 - altr,socfpga-gate-clk
51 - altr,socfpga-a10-pll-clock
52 - altr,socfpga-a10-perip-clk
53 - altr,socfpga-a10-gate-clk
76 - altr,socfpga-perip-clk
77 - altr,socfpga-gate-clk
78 - altr,socfpga-a10-perip-clk
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/linux/Documentation/devicetree/bindings/reset/
H A Daltr,rst-mgr.yaml4 $id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
16 const: altr,rst-mgr
19 - const: altr,stratix10-rst-mgr
20 - const: altr,rst-mgr
25 altr,modrst-offset:
41 const: altr,stratix10-rst-mgr
44 altr,modrst-offset: false
51 compatible = "altr,rst-mgr";
53 altr,modrst-offset = <0x10>;
/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
12 compatible = "altr,socfpga-stratix10";
175 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
188 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
193 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
206 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
211 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
224 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
326 compatible = "altr,socfpga-dw-mshc";
336 altr,sysmgr-syscon = <&sysmgr 0x28 4>;
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/linux/arch/nios2/kernel/
H A Dcpuinfo.c41 if (!of_property_read_bool(cpu, "altr,has-initda")) in setup_cpuinfo()
48 str = of_get_property(cpu, "altr,implementation", &len); in setup_cpuinfo()
51 cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div"); in setup_cpuinfo()
52 cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul"); in setup_cpuinfo()
53 cpuinfo.has_mulx = of_property_read_bool(cpu, "altr,has-mulx"); in setup_cpuinfo()
54 cpuinfo.has_bmx = of_property_read_bool(cpu, "altr,has-bmx"); in setup_cpuinfo()
55 cpuinfo.has_cdx = of_property_read_bool(cpu, "altr,has-cdx"); in setup_cpuinfo()
56 cpuinfo.mmu = of_property_read_bool(cpu, "altr,has-mmu"); in setup_cpuinfo()
73 cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways"); in setup_cpuinfo()
75 panic("altr,tlb-num-ways can't be 0. Please check your hardware " in setup_cpuinfo()
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/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
174 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
185 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
192 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
203 altr,sysmgr-syscon = <&sysmgr 0x48 0>;
210 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
221 altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
325 compatible = "altr,socfpga-dw-mshc";
335 altr,sysmgr-syscon = <&sysmgr 0x28 4>;
342 compatible = "altr,socfpga-denali-nand";
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/linux/Documentation/devicetree/bindings/pci/
H A Daltr,pcie-root-port.yaml5 $id: http://devicetree.org/schemas/altr,pcie-root-port.yaml#
16 PCI controller. The altr,pcie-root-port-1.0 is used for the Cyclone5
18 altr,pcie-root-port-2.0. The Agilex family of chips has three,
23 - altr,pcie-root-port-1.0
24 - altr,pcie-root-port-2.0
25 - altr,pcie-root-port-3.0-f-tile
26 - altr,pcie-root-port-3.0-p-tile
27 - altr,pcie-root-port-3.0-r-tile
79 - altr,pcie-root-port-1.0
103 compatible = "altr,pcie-root-port-1.0";
/linux/drivers/clk/socfpga/
H A Dclk.c12 CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
13 CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
14 CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
15 CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock",
17 CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk",
19 CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk",
/linux/Documentation/devicetree/bindings/gpio/
H A Daltr-pio-1.0.yaml4 $id: http://devicetree.org/schemas/gpio/altr-pio-1.0.yaml#
17 const: altr,pio-1.0
38 altr,ngpio:
43 altr,interrupt-type:
66 compatible = "altr,pio-1.0";
73 altr,ngpio = <32>;
74 altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
/linux/Documentation/devicetree/bindings/fpga/
H A Daltr,socfpga-hps2fpga-bridge.yaml4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
18 - altr,socfpga-lwhps2fpga-bridge
19 - altr,socfpga-hps2fpga-bridge
20 - altr,socfpga-fpga2hps-bridge
41 #include <dt-bindings/reset/altr,rst-mgr.h>
44 compatible = "altr,socfpga-lwhps2fpga-bridge";
H A Daltr,fpga-passive-serial.yaml4 $id: http://devicetree.org/schemas/fpga/altr,fpga-passive-serial.yaml#
26 - altr,fpga-passive-serial
27 - altr,fpga-arria10-passive-serial
67 compatible = "altr,fpga-passive-serial";
H A Daltr,socfpga-fpga2sdram-bridge.yaml4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga2sdram-bridge.yaml#
17 const: altr,socfpga-fpga2sdram-bridge
30 compatible = "altr,socfpga-fpga2sdram-bridge";
/linux/Documentation/devicetree/bindings/soc/altera/
H A Daltr,sys-mgr.yaml4 $id: http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#
17 - const: altr,sys-mgr
21 - const: altr,sys-mgr-s10
22 - const: altr,sys-mgr
40 const: altr,sys-mgr-s10
50 compatible = "altr,sys-mgr", "syscon";
/linux/Documentation/devicetree/bindings/mfd/
H A Daltera-a10sr.txt4 - compatible : "altr,a10sr"
24 - compatible : Should be "altr,a10sr-gpio"
32 - compatible : Should be "altr,a10sr-reset"
38 compatible = "altr,a10sr";
47 compatible = "altr,a10sr-gpio";
53 compatible = "altr,a10sr-reset";
/linux/arch/arm/mach-socfpga/
H A Dsocfpga.c26 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); in socfpga_sysmgr_init()
38 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); in socfpga_sysmgr_init()
41 np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); in socfpga_sysmgr_init()
95 "altr,socfpga",
108 "altr,socfpga-arria10",
/linux/Documentation/devicetree/bindings/mmc/
H A Dsynopsys-dw-mshc.yaml16 - altr,socfpga-dw-mshc
41 altr,sysmgr-syscon:
62 const: altr,socfpga-dw-mshc
65 altr,sysmgr-syscon: true
69 altr,sysmgr-syscon: false

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