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/qemu/include/hw/arm/
H A Dallwinner-h3.h2 * Allwinner H3 System on Chip emulation
21 * The Allwinner H3 is a System on Chip containing four ARM Cortex-A7
39 #include "hw/timer/allwinner-a10-pit.h"
41 #include "hw/misc/allwinner-h3-ccu.h"
42 #include "hw/misc/allwinner-cpucfg.h"
43 #include "hw/misc/allwinner-h3-dramc.h"
44 #include "hw/misc/allwinner-h3-sysctrl.h"
45 #include "hw/misc/allwinner-sid.h"
46 #include "hw/sd/allwinner-sdhost.h"
47 #include "hw/net/allwinner-sun8i-emac.h"
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H A Dallwinner-r40.h2 * Allwinner R40/A40i/T3 System on Chip emulation
24 #include "hw/timer/allwinner-a10-pit.h"
27 #include "hw/sd/allwinner-sdhost.h"
28 #include "hw/misc/allwinner-r40-ccu.h"
29 #include "hw/misc/allwinner-r40-dramc.h"
30 #include "hw/misc/allwinner-sramc.h"
31 #include "hw/i2c/allwinner-i2c.h"
33 #include "hw/net/allwinner-sun8i-emac.h"
36 #include "hw/watchdog/allwinner-wdt.h"
82 * Allwinner R40 object model
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H A Dallwinner-a10.h4 #include "hw/timer/allwinner-a10-pit.h"
5 #include "hw/intc/allwinner-a10-pic.h"
7 #include "hw/sd/allwinner-sdhost.h"
11 #include "hw/rtc/allwinner-rtc.h"
12 #include "hw/misc/allwinner-a10-ccm.h"
13 #include "hw/misc/allwinner-a10-dramc.h"
14 #include "hw/i2c/allwinner-i2c.h"
15 #include "hw/ssi/allwinner-a10-spi.h"
16 #include "hw/watchdog/allwinner-wdt.h"
27 #define TYPE_AW_A10 "allwinner-a10"
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/qemu/include/hw/rtc/
H A Dallwinner-rtc.h2 * Allwinner Real Time Clock emulation
44 /** Generic Allwinner RTC device (abstract) */
45 #define TYPE_AW_RTC "allwinner-rtc"
47 /** Allwinner RTC sun4i family (A10, A12) */
50 /** Allwinner RTC sun6i family and newer (A31, H2+, H3, etc) */
53 /** Allwinner RTC sun7i family (A20) */
68 * Allwinner RTC per-object instance state.
93 * Allwinner RTC class-level struct.
/qemu/include/hw/watchdog/
H A Dallwinner-wdt.h2 * Allwinner Watchdog emulation
6 * This file is derived from Allwinner RTC,
31 * This is a model of the Allwinner watchdog.
38 #define TYPE_AW_WDT "allwinner-wdt"
40 /** Allwinner WDT sun4i family (A10, A12), also sun7i (A20) */
43 /** Allwinner WDT sun6i family and newer (A31, H2+, H3, etc) */
52 * Allwinner WDT object instance state.
66 * Allwinner WDT class-level struct.
/qemu/include/hw/sd/
H A Dallwinner-sdhost.h2 * Allwinner (sun4i and above) SD Host Controller emulation
32 /** Generic Allwinner SD Host Controller (abstract) */
33 #define TYPE_AW_SDHOST "allwinner-sdhost"
35 /** Allwinner sun4i family (A10, A12) */
38 /** Allwinner sun5i family and newer (A13, H2+, H3, etc) */
41 /** Allwinner sun50i-a64 */
44 /** Allwinner sun50i-a64 emmc */
59 * Allwinner SD Host Controller object instance state.
127 * Allwinner SD Host Controller class-level struct.
/qemu/hw/watchdog/
H A Dtrace-events3 # allwinner-wdt.c
4 allwinner_wdt_read(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog read: offset …
5 allwinner_wdt_write(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog write: offse…
6 allwinner_wdt_reset_enter(void) "Allwinner watchdog: reset"
7 allwinner_wdt_update_timer(uint8_t count) "Allwinner watchdog: count %" PRIu8
8 allwinner_wdt_expired(bool enabled, bool reset_enabled) "Allwinner watchdog: enabled %u reset_enabl…
/qemu/hw/misc/
H A Dmeson.build44 system_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))
45 system_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c'))
46 system_ss.add(when: 'CONFIG_ALLWINNER_A10_DRAMC', if_true: files('allwinner-a10-dramc.c'))
47 system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-ccu.c'))
48 specific_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-cpucfg.c'))
49 system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-dramc.c'))
50 system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-sysctrl.c'))
51 system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sid.c'))
52 system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-ccu.c'))
53 system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-dramc.c'))
H A Dallwinner-a10-dramc.c2 * Allwinner A10 DRAM Controller emulation
6 * This file is derived from Allwinner H3 DRAMC,
29 #include "hw/misc/allwinner-a10-dramc.h"
147 .name = "allwinner-a10-dramc",
/qemu/docs/system/arm/
H A Dorangepi.rst4 The Xunlong Orange Pi PC is an Allwinner H3 System on Chip
20 * Timer device (re-used from Allwinner A10)
40 Also see the 'unimplemented' array in the Allwinner H3 SoC module
41 for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-h3.c``
48 machine can also emulate the BootROM which is present on an actual Allwinner H3
57 - allwinner-rtc.base-year=YYYY
59 The Allwinner RTC device is automatically created by the Orange Pi PC machine
65 - allwinner-sid.identifier=abcd1122-a000-b000-c000-12345678ffff
76 -global allwinner-rtc.base-year=2000
211 The NetBSD operating system also includes support for Allwinner H3 based boards,
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H A Dbananapi_m2u.rst5 Allwinner A40i/R40/V40 SoC. It features 2GB of RAM and 8GB eMMC. It also
19 * Timer device (re-used from Allwinner A10)
39 Also see the 'unimplemented' array in the Allwinner R40 SoC module
40 for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-r40.c``
47 machine can also emulate the BootROM which is present on an actual Allwinner R40
114 The BootROM of allwinner R40 loading u-boot from the 8KiB offset of sdcard.
/qemu/include/hw/misc/
H A Dallwinner-sramc.h2 * Allwinner SRAM controller emulation
31 #define TYPE_AW_SRAMC "allwinner-sramc"
38 * Allwinner SRAMC object instance state
55 * Allwinner SRAM Controller class-level struct.
H A Dallwinner-a10-ccm.h2 * Allwinner A10 Clock Control Module emulation
6 * This file is derived from Allwinner H3 CCU,
47 #define TYPE_AW_A10_CCM "allwinner-a10-ccm"
53 * Allwinner A10 CCM object instance state.
H A Dallwinner-a10-dramc.h2 * Allwinner A10 DRAM Controller emulation
6 * This file is derived from Allwinner H3 DRAMC,
48 #define TYPE_AW_A10_DRAMC "allwinner-a10-dramc"
54 * Allwinner A10 DRAMC object instance state.
H A Dallwinner-cpucfg.h2 * Allwinner CPU Configuration Module emulation
31 #define TYPE_AW_CPUCFG "allwinner-cpucfg"
37 * Allwinner CPU Configuration Module instance state
H A Dallwinner-sid.h2 * Allwinner Security ID emulation
32 #define TYPE_AW_SID "allwinner-sid"
38 * Allwinner Security ID object instance state
H A Dallwinner-h3-sysctrl.h2 * Allwinner H3 System Control emulation
45 #define TYPE_AW_H3_SYSCTRL "allwinner-h3-sysctrl"
51 * Allwinner H3 System Control object instance state
H A Dallwinner-h3-ccu.h2 * Allwinner H3 Clock Control Unit emulation
44 #define TYPE_AW_H3_CCU "allwinner-h3-ccu"
50 * Allwinner H3 CCU object instance state.
H A Dallwinner-r40-ccu.h2 * Allwinner R40 Clock Control Unit emulation
44 #define TYPE_AW_R40_CCU "allwinner-r40-ccu"
50 * Allwinner R40 CCU object instance state.
H A Dallwinner-h3-dramc.h2 * Allwinner H3 SDRAM Controller emulation
60 #define TYPE_AW_H3_DRAMC "allwinner-h3-dramc"
66 * Allwinner H3 SDRAM Controller object instance state.
H A Dallwinner-r40-dramc.h2 * Allwinner R40 SDRAM Controller emulation
60 #define TYPE_AW_R40_DRAMC "allwinner-r40-dramc"
66 * Allwinner R40 SDRAM Controller object instance state.
/qemu/include/hw/i2c/
H A Dallwinner-i2c.h2 * Allwinner I2C Bus Serial Interface registers definition
30 #define TYPE_AW_I2C "allwinner.i2c"
32 /** Allwinner I2C sun6i family and newer (A31, H2+, H3, etc) */
/qemu/include/hw/net/
H A Dallwinner_emac.h2 * Emulation of Allwinner EMAC Fast Ethernet controller and
7 * Allwinner EMAC register definitions from Linux kernel are:
33 #define TYPE_AW_EMAC "allwinner-emac"
37 * Allwinner EMAC register list
H A Dallwinner-sun8i-emac.h2 * Allwinner Sun8i Ethernet MAC emulation
32 #define TYPE_AW_SUN8I_EMAC "allwinner-sun8i-emac"
38 * Allwinner Sun8i EMAC object instance state
/qemu/hw/intc/
H A Dallwinner-a10-pic.c2 * Allwinner A10 interrupt controller device emulation
21 #include "hw/intc/allwinner-a10-pic.h"
110 * the version originally shipped by Allwinner) pretends to in aw_a10_pic_write()
195 dc->desc = "allwinner a10 pic"; in aw_a10_pic_class_init()

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