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/linux-6.15/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
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Dqcom,pm8018-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
14 oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
19 - qcom,pm8018-adc
20 - qcom,pm8038-adc
21 - qcom,pm8058-adc
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Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 SPMI PMIC voltage ADC (VADC) provides interface to clients to read
15 voltage. The VADC is a 15-bit sigma-delta ADC.
16 SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read
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Dsamsung,exynos-adc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Analog to Digital Converter (ADC)
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - enum:
16 - samsung,exynos-adc-v1 # Exynos5250
17 - samsung,exynos-adc-v2
18 - samsung,exynos3250-adc
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Drenesas,rzg2l-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rzg2l-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L ADC
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
13 A/D Converter block is a successive approximation analog-to-digital converter
14 with a 12-bit accuracy. Up to eight analog input channels can be selected.
15 Conversions can be performed in single or repeat mode. Result of the ADC is
16 stored in a 32-bit data register corresponding to each channel.
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Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7192 ADC device driver
11 - Michael Hennerich <michael.hennerich@analog.com>
14 Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
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Dadi,ad7124.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7124 ADC device driver
11 - Stefan Popa <stefan.popa@analog.com>
14 Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
21 - adi,ad7124-4
22 - adi,ad7124-8
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Dgehc,pmc-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/gehc,pmc-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GE HealthCare PMC Analog to Digital Converter (ADC)
10 - Herve Codina <herve.codina@bootlin.com>
13 The GE HealthCare PMC ADC is a 16-Channel (voltage and current), 16-Bit ADC
18 const: gehc,pmc-adc
23 vdd-supply:
27 vdda-supply:
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/linux-6.15/drivers/iio/adc/
Dingenic-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ADC driver for the Ingenic JZ47xx SoCs
4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
121 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
124 /* Second channel (INGENIC_ADC_TOUCH_YP): sample YP vs. GND */ in ingenic_adc_set_adcmd()
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Drzg2l_adc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
25 #define DRIVER_NAME "rzg2l-adc"
59 * struct rzg2l_adc_hw_params - ADC hardware specific parameters
60 * @default_adsmp: default ADC sampling period (see ADM3 register); index 0 is
61 * used for voltage channels, index 1 is used for temperature channel
62 * @adsmp_mask: ADC sampling period mask (see ADM3 register)
64 * @default_adcmp: default ADC cmp (see ADM3 register)
95 * struct rzg2l_adc_channel - ADC channel descriptor
96 * @name: ADC channel name
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Dpalmas_gpadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * palmas-adc.c -- TI PALMAS GPADC.
26 #define MOD_NAME "palmas-gpadc"
29 #define PALMAS_GPADC_TRIMINVALID -1
42 bool is_uncalibrated; /* if channel has calibration data */
80 int channel; member
90 * struct palmas_gpadc - the palmas_gpadc structure
91 * @ch0_current: channel 0 current source setting
96 * @ch3_current: channel 0 current source setting
110 * This is the palmas_gpadc structure to store run-time information
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Dstm32-dfsdm-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is the ADC part of the STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
10 #include <linux/dma-mapping.h>
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
14 #include <linux/iio/hw-consumer.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
29 #include "stm32-dfsdm.h"
44 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */
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Dmxs-lradc-adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale MXS LRADC ADC driver
18 #include <linux/mfd/mxs-lradc.h>
43 "mxs-lradc-channel0",
44 "mxs-lradc-channel1",
45 "mxs-lradc-channel2",
46 "mxs-lradc-channel3",
47 "mxs-lradc-channel4",
48 "mxs-lradc-channel5",
52 "mxs-lradc-thresh0",
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Dqcom-pm8xxx-xoadc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * specific-purpose and general purpose ADC converters and channels.
13 #include <linux/iio/adc/qcom-vadc-common.h>
27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
28 * drivers/misc/pmic8058-xoadc.c
29 * drivers/hwmon/pm8xxx-adc.c
57 /* Proper ADC registers */
71 * The channel mask includes the bits selecting channel mux and prescaler
72 * on PM8058, or channel mux and premux on PM8921.
99 * On a later ADC the decimation factors are defined as
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Dti-ads8344.c1 // SPDX-License-Identifier: GPL-2.0+
3 * ADS8344 16-bit 8-Channel ADC driver
19 #define ADS8344_CHANNEL(channel) ((channel) << 4) argument
26 * Lock protecting access to adc->tx_buff and rx_buff,
37 .type = IIO_VOLTAGE, \
39 .channel = chan, \
47 .type = IIO_VOLTAGE, \
49 .channel = (chan1), \
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
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Dmcp3911.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip MCP3911, Two-channel Analog Front End
106 int (*config)(struct mcp3911 *adc, bool external_vref);
107 int (*get_osr)(struct mcp3911 *adc, u32 *val);
108 int (*set_osr)(struct mcp3911 *adc, u32 val);
109 int (*enable_offset)(struct mcp3911 *adc, bool enable);
110 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
111 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
112 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
132 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
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Dqcom-spmi-adc5.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/iio/adc/qcom-vadc-common.h>
23 #include <dt-bindings/iio/qcom,spmi-vadc.h>
104 * struct adc5_channel_prop - ADC channel property.
105 * @channel: channel number, refer to the channel list.
108 * @decimation: sampling rate supported for the channel.
109 * @sid: slave id of PMIC owning the channel, for PMIC7.
110 * @prescale: channel scaling performed on the input signal.
113 * @avg_samples: ability to provide single result from the ADC
116 * physical units desired by the client for the channel.
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Dgehc-pmc-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * The GE HealthCare PMC ADC is a 16-Channel (Voltage and current), 16-Bit
4 * ADC with an I2C Interface.
11 #include <dt-bindings/iio/adc/gehc,pmc-adc.h>
29 .type = IIO_VOLTAGE, \
31 .channel = (_ch), \
38 .type = IIO_CURRENT, \
40 .channel = (_ch), \
86 ret = i2c_smbus_read_word_swapped(pmc_adc->client, cmd); in pmc_adc_read_raw_ch()
88 dev_err(&pmc_adc->client->dev, "i2c read word failed (%d)\n", ret); in pmc_adc_read_raw_ch()
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Dti-adc0832.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
7 * Datasheet: https://www.ti.com/lit/ds/symlink/adc0832-n.pdf
33 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
45 .type = IIO_VOLTAGE, \
47 .channel = chan, \
60 .type = IIO_VOLTAGE, \
62 .channel = (chan1), \
120 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
122 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
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Dstmpe-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * STMicroelectronics STMPE811 IIO ADC Driver
5 * 4 channel, 10/12-bit ADC
7 * Copyright (C) 2013-2018 Toradex AG <stefan.agner@toradex.com>
28 #define STMPE_REG_ADC_DATA_CH(channel) (0x30 + 2 * (channel)) argument
42 #define STMPE_ADC_CH(channel) ((1 << (channel)) & 0xff) argument
52 /* We are allocating plus one for the temperature channel */
57 u8 channel; member
66 mutex_lock(&info->lock); in stmpe_read_voltage()
68 reinit_completion(&info->completion); in stmpe_read_voltage()
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Dti-adc12138.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
52 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
64 .type = IIO_VOLTAGE, \
66 .channel = chan, \
82 .type = IIO_VOLTAGE, \
84 .channel = (chan1), \
128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument
132 .tx_buf = adc->tx_buf, in adc12138_mode_programming()
133 .rx_buf = adc->rx_buf, in adc12138_mode_programming()
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/linux-6.15/Documentation/iio/
Diio_adc.rst1 .. SPDX-License-Identifier: GPL-2.0-only
12 device drivers. This documentation describes common ADC features and explains
15 1. ADC Channel Types
19 in a slightly different way. An ADC digitizes the analog input voltage over a
20 span that is often given by the provided voltage reference, the input type, and
21 the input polarity. The input range allowed to an ADC channel is needed to
23 real-world units (millivolts for voltage measurement, milliamps for current
28 to derive the allowed input range for an ADC. For clarity, the sections below
30 type, and input polarity.
32 There are three general types of ADC inputs (single-ended, differential,
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/linux-6.15/arch/arm64/boot/dts/qcom/
Dsc8180x-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023, Linaro Limited
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/spmi/spmi.h>
10 #include <dt-bindings/iio/qcom,spmi-vadc.h>
13 thermal-zones {
14 pmc8180-thermal {
15 polling-delay-passive = <100>;
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/linux-6.15/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-adc-tm-hc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC HC Thermal Monitoring
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
15 const: qcom,spmi-adc-tm-hc
23 "#thermal-sensor-cells":
26 "#address-cells":
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Dqcom-spmi-adc-tm5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC Thermal Monitoring
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
16 - qcom,spmi-adc-tm5
17 - qcom,spmi-adc-tm5-gen2
18 - qcom,adc-tm7 # Incomplete / subject to change
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