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/qemu/tests/qemu-iotests/
H A D171.out23 write across image boundary
39 read across image boundary
62 write zeroes across image boundary
84 discard across image boundary
115 write across image boundary
131 read across image boundary
154 write zeroes across image boundary
178 discard across image boundary
211 write across image boundary
227 read across image boundary
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H A D17183 echo "write across image boundary"
103 echo "read across image boundary"
128 echo "write zeroes across image boundary"
147 echo "discard across image boundary"
H A D028141 echo '=== Reading across backing EOF in one operation ==='
154 # Read 32 bytes across the base EOF from the top;
H A D216.out2 === Copy-on-read across nodes ===
H A D310.out2 === Copy-on-read across nodes ===
/qemu/docs/system/devices/
H A Dcxl.rst60 persistent memory. The CXL topology may support interleaving across a
88 decisions about how to configure interleave across available CXL
109 may be a mapping to a single Root Port (RP) or across a set of
167 | | | | memory accesses across HB0/HB1 | | | |
210 particular interleave setup across the CXL Host Bridges (HB)
213 across HB0 and HB1.
217 a single port or interleave them across multiple ports.
223 CFMW0 to be interleaved across RP0 and RP1, providing 2 way
228 across for example CXL Type3 0 and CXL Type3 2).
229 HDM4 is used to enable system wide 4 way interleave across all
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/qemu/include/crypto/
H A Dhmac.h79 * Computes the hmac across all the memory regions
112 * Computes the hmac across all the memory region
144 * Computes the hmac across all the memory regions
168 * Computes the hmac across all the memory region
H A Dhash.h76 * Computes the hash across all the memory regions
108 * Computes the hash across all the memory region
139 * Computes the hash across all the memory regions
282 * Computes the hash across all the memory region
305 * Computes the hash across all the memory regions
328 * Computes the hash across all the memory region
/qemu/docs/system/
H A Dcpu-models-mips.rst.inc14 across all desired hosts.
46 across all desired hosts.
90 across all desired hosts.
H A Dcpu-models-x86.rst.inc19 stable CPU is exposed to the guest across hosts. This is the
72 across all desired hosts.
277 across all desired hosts.
/qemu/linux-headers/asm-generic/
H A Dmman-common.h51 /* common parameters: try to keep these consistent across architectures */
54 #define MADV_DONTFORK 10 /* don't inherit across fork */
55 #define MADV_DOFORK 11 /* do inherit across fork */
/qemu/linux-headers/asm-mips/
H A Dmman.h78 /* common parameters: try to keep these consistent across architectures */
81 #define MADV_DONTFORK 10 /* don't inherit across fork */
82 #define MADV_DOFORK 11 /* do inherit across fork */
/qemu/tcg/tci/
H A Dtcg-target-mo.h13 * We prefer consistency across hosts on this.
/qemu/include/hw/rtc/
H A Dpl031.h32 * Needed to preserve the tick_count across migration, even if the
/qemu/tests/docker/
H A Dtest-fuzz16 # the build script runs out of $src so we need to copy across
/qemu/docs/devel/
H A Dmultiple-iothreads.rst32 scalability bottleneck on hosts with many CPUs. Work can be spread across
106 Side note: the best way to schedule a function call across threads is to call
H A Dmulti-thread-tcg.rst168 as the synchronization point across threads, thereby ensuring that we only
197 - can be across-vCPUs
236 As the BQL, or global iothread mutex is shared across the system we
/qemu/scripts/qemugdb/
H A Dtcg.py13 # 'qemu tcg-lock-status' -- display the TCG lock status across threads
/qemu/include/hw/xen/interface/io/
H A Dxenbus.h15 * status of initialisation across the bus. States here imply nothing about
/qemu/block/
H A Dblock-ram-registrar.c45 * value that does not change across resize. in blk_ram_registrar_init()
/qemu/.gitlab-ci.d/
H A Dcheck-patch.py3 # check-patch.py: run checkpatch.pl across all commits in a branch
/qemu/docs/specs/
H A Dppc-spapr-hotplug.rst49 value that's unique across resources of that type.
61 ``<n>`` is unique across all PCI/VIO device slots.
68 Each 4-byte entry: BE-encoded ``<index>`` integer that is unique across all
88 across all resources of specified type.
/qemu/hw/ppc/
H A Dspapr_pci_vfio.c42 * iterate across all groups in the container, without any logic in vfio_eeh_container_ok()
100 * We don't yet have logic to synchronize EEH state across in vfio_eeh_as_container()
/qemu/target/avr/
H A Dhelper.c38 * as the skip would not be preserved across the interrupt. in avr_cpu_exec_interrupt()
200 * live in a host cpu register across the store. We can however
/qemu/util/
H A Dfdmon-poll.c19 * heap allocation is expensive enough that we want to reuse arrays across

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