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/linux-6.8/drivers/media/platform/renesas/vsp1/
Dvsp1_dl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * vsp1_dl.c -- R-Car VSP1 Display List
11 #include <linux/dma-mapping.h>
41 * struct vsp1_dl_ext_header - Extended display list header
43 * @pre_ext_dl_num_cmd: number of pre-extended command bodies to parse
45 * @pre_ext_dl_plist: start address of pre-extended display list bodies
46 * @post_ext_dl_num_cmd: number of post-extended command bodies to parse
47 * @post_ext_dl_plist: start address of post-extended display list bodies
54 * expecting 32-bit accesses. The flags are appropriate to the whole
79 * struct vsp1_pre_ext_dl_body - Pre Extended Display List Body
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/linux-6.8/drivers/auxdisplay/
Dline-display.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Character line display core support
20 #include "line-display.h"
25 * linedisp_scroll() - scroll the display by a character
26 * @t: really a pointer to the private data structure
28 * Scroll the current message along the display by one character, rearming the
34 unsigned int i, ch = linedisp->scroll_pos; in linedisp_scroll()
35 unsigned int num_chars = linedisp->num_chars; in linedisp_scroll()
40 for (; i < num_chars && ch < linedisp->message_len; i++, ch++) in linedisp_scroll()
41 linedisp->buf[i] = linedisp->message[ch]; in linedisp_scroll()
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/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_hotplug.c4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
36 * Simply put, hotplug occurs when a display is connected to or disconnected
38 * Display Port short pulses and MST devices involved, complicating matters.
45 * into a platform independent mask of hotplug pins that have fired.
49 * further processing to appropriate bottom halves (Display Port specific and
52 * The Display Port work function i915_digport_work_func() calls into
54 * pulses, with failures and non-MST long pulses triggering regular hotplug
61 * Finally, the userspace is responsible for triggering a modeset upon receiving
65 * number of interrupts per hotplug pin per a period of time, and if the number
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Dintel_frontbuffer.c4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
33 * To be able to do so we track frontbuffers using a bitmask for all possible
37 * and when the frontbuffer is exchanged with a flip. Subsystems interested in
42 * On a high level there are two types of powersaving features. The first one
43 * work like a special cache (FBC and PSR) and are interested when they should
51 * The other type of display power saving feature only cares about busyness
70 * frontbuffer_flush - flush frontbuffer
86 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
87 frontbuffer_bits &= ~i915->display.fb_tracking.busy_bits; in frontbuffer_flush()
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Dintel_cdclk.c2 * Copyright © 2006-2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * The display engine uses several different clocks to do its work. There
50 * are the core display clock (CDCLK) and RAWCLK.
52 * CDCLK clocks most of the display pipe logic, and thus its frequency
58 * to minimize power consumption for a given display configuration.
59 * Typically changes to the CDCLK frequency require all the display pipes
66 * RAWCLK is a fixed frequency clock, often used by various auxiliary
85 dev_priv->display.funcs.cdclk->get_cdclk(dev_priv, cdclk_config); in intel_cdclk_get_cdclk()
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Dintel_lpe_audio.c4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24 * Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
34 * Atom platforms (e.g. valleyview and cherryTrail) integrates a DMA-based
39 * The interface is handled by a separate standalone driver maintained in the
41 * subsystems, a bridge is setup between the hdmi-lpe-audio and i915:
42 * 1. Create a platform device to share MMIO/IRQ resources
45 * the hdmi-lpe-audio driver probes the lpe audio device and creates a new
50 * uninstall the hdmi-lpe-audio driver before uninstalling i915 module,
51 * otherwise we might run into use-after-free issues after i915 removes the
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/linux-6.8/Documentation/devicetree/bindings/display/
Dsimple-framebuffer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans de Goede <hdegoede@redhat.com>
13 A simple frame-buffer describes a frame-buffer setup by firmware or
14 the bootloader, with the assumption that the display hardware has
19 sub-nodes of the chosen node (*). Simplefb nodes must be named
22 If the devicetree contains nodes for the display hardware used by a
23 simplefb, then the simplefb node must contain a property called
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Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Xylon LogiCVC display controller
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 The Xylon LogiCVC is a display controller that supports multiple layers.
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
18 Because the controller is intended for use in a FPGA, most of the
20 synthesis time. As a result, many of the device-tree bindings are meant to
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/linux-6.8/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Display Panels
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 display panels. It doesn't constitute a device tree binding specification by
24 width-mm:
29 height-mm:
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Dpanel-simple.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
14 This binding file is a collection of the simple (dumb) panels that
15 requires only a single power-supply.
16 There are optionally a backlight and an enable GPIO.
17 The panel may use an OF graph binding for the association to the display,
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/linux-6.8/Documentation/gpu/amdgpu/display/
Ddcn-overview.rst2 Display Core Next (DCN)
5 To equip our readers with the basic knowledge of how AMD Display Core Next
7 you can see a picture that provides a DCN overview, keep in mind that this is a
10 .. kernel-figure:: dc_pipeline_overview.svg
15 * **Display Controller Hub (DCHUB)**: This is the gateway between the Scalable
19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel
24 multiple planes, using global or per-pixel alpha.
27 the display.
32 * **Display Output (DIO)**: Codify the output to the display connected to our
35 * **Display Writeback (DWB)**: It provides the ability to write the output of
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Dmpo-overview.rst6 'Documentation/gpu/amdgpu/display/dcn-overview.rst'.
10 fixed-function hardware in the display controller rather than using graphics or
12 the graphics/compute pipelines can be put into low-power states. In summary,
15 * Decreased GPU and CPU workload - no composition shaders needed, no extra
17 * Plane independent page flips - No need to be tied to global compositor
18 page-flip present rate, reduced latency, independent timing.
20 .. note:: Keep in mind that MPO is all about power-saving; if you want to learn
21 more about power-save in the display context, check the link:
22 `Power <https://gitlab.freedesktop.org/pq/color-and-hdr/-/blob/main/doc/power.rst>`__.
25 model only uses a single userspace IOCTL for configuring the display hardware
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Dindex.rst1 .. _amdgpu-display-core:
4 drm/amd/display - Display Core (DC)
7 AMD display engine is partially shared with other operating systems; for this
8 reason, our Display Core Driver is divided into two pieces:
10 1. **Display Core (DC)** contains the OS-agnostic components. Things like
12 2. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
15 The display pipe is responsible for "scanning out" a rendered frame from the
16 GPU memory (also called VRAM, FrameBuffer, etc.) to a display. In other words,
23 If you want to learn more about our driver details, take a look at the below
28 display-manager.rst
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Ddisplay-manager.rst2 AMDgpu Display Manager
8 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
17 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
20 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
26 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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/linux-6.8/Documentation/gpu/
Dtegra.rst2 drm/tegra NVIDIA Tegra GPU and display driver
5 NVIDIA Tegra SoCs support a set of display, graphics and video functions via
6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
30 The various host1x clients need to be bound together into a logical device in
32 this is implemented in the host1x driver. When a driver is registered with the
33 infrastructure it provides a list of compatible strings specifying the devices
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Dkomeda-kms.rst1 .. SPDX-License-Identifier: GPL-2.0
4 drm/komeda Arm display driver
7 The drm/komeda driver supports the Arm display processor D71 and later products,
8 this document gives a brief overview of driver design: how it works and why
11 Overview of D71 like display IPs
14 From D71, Arm display IP begins to adopt a flexible and modularized
15 architecture. A display pipeline is made up of multiple individual and
17 specific capabilities that can give the flowed pipeline pixel data a
23 -----
30 ------
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Di915.rst6 models) integrated GFX chipsets with both Intel display and rendering
7 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
13 This section covers core driver infrastructure used by both the display
17 ------------------------
19 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
22 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
25 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
29 ------------------
31 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
34 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
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/linux-6.8/Documentation/devicetree/bindings/display/msm/
Dqcom,mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Mobile Display SubSystem (MDSS)
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
14 This is the bindings documentation for the Mobile Display Subsystem(MDSS) that
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
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/linux-6.8/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
14 multiplexer in the front to select any of the four IPU display
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
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/linux-6.8/include/drm/
Dgud.h1 /* SPDX-License-Identifier: MIT */
12 * struct gud_display_descriptor_req - Display descriptor
16 * - STATUS_ON_SET: Always do a status request after a SET request.
18 * no way to control the status stage of a control OUT
19 * request that has a payload.
20 * - FULL_UPDATE: Always send the entire framebuffer when flushing changes.
24 * a chance to reset its state machine if needed.
27 * - GUD_COMPRESSION_LZ4: LZ4 lossless compression.
29 * This is useful for devices that don't have a big enough
36 * Devices that have only one display mode will have min_width == max_width
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/linux-6.8/Documentation/userspace-api/media/v4l/
Dext-ctrls-colorimetry.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _colorimetry-controls:
15 -----------------------
17 .. _colorimetry-control-id:
22 return a description of this control class.
32 .. flat-table:: struct v4l2_ctrl_hdr10_cll_info
33 :header-rows: 0
34 :stub-columns: 0
37 * - __u16
38 - ``max_content_light_level``
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/linux-6.8/Documentation/devicetree/bindings/auxdisplay/
Dmodtronix,lcd2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Modtronix engineering LCD2S Character LCD Display
10 - Lars Poeschel <poeschel@lemonage.de>
13 The LCD2S is a Character LCD Display manufactured by Modtronix Engineering.
14 The display supports a serial I2C and SPI interface. The driver currently
24 I2C bus address of the display.
26 display-height-chars:
27 description: Height of the display, in character cells.
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/linux-6.8/drivers/gpu/drm/xe/
Dxe_step.c1 // SPDX-License-Identifier: MIT
15 * (Graphics/Media/Display) stepping values that can be compared numerically.
18 * steppings. E.g., in some cases a higher PCI revision may translate to a
19 * lower stepping of the GT and/or display IP.
27 * Some platforms always have the same stepping value for GT and display;
28 * use a macro to define these to make it easier to identify the platforms
39 .display = STEP_##x_
42 __diag_ignore_all("-Woverride-init", "Allow field overrides in table");
46 [0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_B0 },
47 [1] = { COMMON_GT_MEDIA_STEP(B0), .display = STEP_D0 },
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/linux-6.8/Documentation/arch/arm/omap/
Ddss.rst2 OMAP2/3 Display Subsystem
7 TV-out and multiple display support, but there are lots of small improvements
10 The DSS2 driver (omapdss module) is in arch/arm/plat-omap/dss/, and the FB,
15 --------
19 - MIPI DPI (parallel) output
20 - MIPI DSI output in command mode
21 - MIPI DBI (RFBI) output
22 - SDI output
23 - TV output
24 - All pieces can be compiled as a module or inside kernel
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/linux-6.8/include/linux/
Ddio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Maybe this should handle DIO-II later?
18 /* The DIO boards in a system are distinguished by 'select codes' which
19 * range from 0-63 (DIO) and 132-255 (DIO-II).
22 * So DIO cards cover [0x600000-0x800000); the areas [0x200000-0x400000) and
23 * [0x800000-0x1000000) are for additional space required by things
24 * like framebuffers. [0x400000-0x600000) is for miscellaneous internal I/O.
27 * DIO-II boards are at 0x1000000 + (sc - 132) * 0x400000
28 * which is address range [0x1000000-0x20000000) -- too big to map completely,
29 * so currently we just don't handle DIO-II boards. It wouldn't be hard to
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