| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | xilinx.yaml | 7 title: Xilinx Zynq Platforms Device Tree Bindings
13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
23 - digilent,zynq-zybo
24 - digilent,zynq-zybo-z7
25 - xlnx,zynq-cc108
26 - xlnx,zynq-zc702
27 - xlnx,zynq-zc706
28 - xlnx,zynq-zc770-xm010
29 - xlnx,zynq-zc770-xm011
30 - xlnx,zynq-zc770-xm012
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | zynq-reset.txt | 1 Xilinx Zynq Reset Manager
3 The Zynq AP-SoC has several different resets.
5 See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.
8 - compatible: "xlnx,zynq-reset"
11 This should be a phandle to the Zynq's SLCR registers.
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
18 compatible = "xlnx,zynq-reset";
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| D | xlnx,zynqmp-reset.txt | 2 = Zynq UltraScale+ MPSoC and Versal reset driver binding =
4 The Zynq UltraScale+ MPSoC and Versal has several different resets.
6 See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information
13 - compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform
41 For list of all valid reset indices for Zynq UltraScale+ MPSoC see
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| /linux-5.10/Documentation/devicetree/bindings/net/can/ |
| D | xilinx_can.txt | 1 Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings
6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers
19 - tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN).
20 - rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in
29 For Zynq CANPS Dts file:
31 compatible = "xlnx,zynq-can-1.0";
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| /linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 7 available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The
14 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
20 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
76 compatible = "xlnx,zynq-xadc-1.00.a";
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| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | zynq-7000.txt | 1 Device Tree Clock bindings for the Zynq 7000 EPP
3 The Zynq EPP has several different clk providers, each with there own bindings.
7 See Chapter 25 of Zynq TRM for more information about Zynq clocks.
10 The clock controller is a logical abstraction of Zynq's clock tree. It reads
19 (usually 33 MHz oscillators are used for Zynq platforms)
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| D | xlnx,zynqmp-clk.txt | 2 Device Tree Clock bindings for the Zynq Ultrascale+ MPSoC controlled using
3 Zynq MPSoC firmware interface
5 The clock controller is a h/w block of Zynq Ultrascale+ MPSoC clock
24 The Zynq UltraScale+ MPSoC has one primary and four alternative reference clock
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| /linux-5.10/arch/arm/boot/dts/ |
| D | zynq-7000.dtsi | 9 compatible = "xlnx,zynq-7000";
103 compatible = "xlnx,zynq-xadc-1.00.a";
111 compatible = "xlnx,zynq-can-1.0";
123 compatible = "xlnx,zynq-can-1.0";
135 compatible = "xlnx,zynq-gpio-1.0";
187 compatible = "xlnx,zynq-ddrc-a05";
210 compatible = "xlnx,zynq-spi-r1p6";
222 compatible = "xlnx,zynq-spi-r1p6";
234 compatible = "cdns,zynq-gem", "cdns,gem";
245 compatible = "cdns,zynq-gem", "cdns,gem";
[all …]
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| D | zynq-zturn.dts | 6 * Based on zynq-zed.dts which is:
13 /include/ "zynq-7000.dtsi"
16 model = "Zynq Z-Turn MYIR Board";
17 compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
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| D | zynq-zed.dts | 7 #include "zynq-7000.dtsi"
11 compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000";
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| D | zynq-zybo-z7.dts | 3 #include "zynq-7000.dtsi"
8 compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
29 label = "zynq-zybo-z7:green:ld4";
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| D | zynq-microzed.dts | 7 /include/ "zynq-7000.dtsi"
11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
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| D | zynq-zc770-xm012.dts | 8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
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| D | zynq-zybo.dts | 7 #include "zynq-7000.dtsi"
11 compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
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| D | zynq-zc770-xm011.dts | 8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
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| D | zynq-cc108.dts | 12 /include/ "zynq-7000.dtsi"
16 compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
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| D | zynq-zc770-xm013.dts | 8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
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| /linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | synopsys.txt | 6 The Zynq DDR ECC controller has an optional ECC support in half-bus width
14 - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
23 compatible = "xlnx,zynq-ddrc-a05";
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| /linux-5.10/arch/arm/mach-zynq/ |
| D | common.c | 15 #include <linux/clk/zynq.h>
59 .name = "cpuidle-zynq",
63 * zynq_get_revision - Get Zynq silicon revision
73 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-devcfg-1.0"); in zynq_get_revision()
116 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Xilinx Zynq"); in zynq_init_machine()
183 "xlnx,zynq-7000",
187 DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
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| /linux-5.10/drivers/firmware/xilinx/ |
| D | Kconfig | 4 menu "Zynq MPSoC Firmware Drivers"
8 bool "Enable Xilinx Zynq MPSoC firmware interface"
20 bool "Enable Xilinx Zynq MPSoC firmware debug APIs"
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| /linux-5.10/Documentation/devicetree/bindings/fpga/ |
| D | xilinx-zynq-fpga-mgr.txt | 1 Xilinx Zynq FPGA Manager
4 - compatible: should contain "xlnx,zynq-devcfg-1.0"
13 compatible = "xlnx,zynq-devcfg-1.0";
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| /linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-zynq-qspi.txt | 1 Xilinx Zynq QSPI controller Device Tree Bindings
5 - compatible : Should be "xlnx,zynq-qspi-1.0".
18 compatible = "xlnx,zynq-qspi-1.0";
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| /linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | xlnx,zynq-pinctrl.txt | 1 Binding for Xilinx Zynq Pinctrl
4 - compatible: "xlnx,zynq-pinctrl"
12 Zynq's pin configuration nodes act as a container for an arbitrary number of
79 compatible = "xlnx,pinctrl-zynq";
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| /linux-5.10/drivers/cpuidle/ |
| D | cpuidle-zynq.c | 5 * CPU idle support for Xilinx Zynq
54 pr_info("Xilinx Zynq CpuIdle Driver started\n"); in zynq_cpuidle_probe()
61 .name = "cpuidle-zynq",
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| /linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-zynq.txt | 1 Xilinx Zynq GPIO controller Device Tree Bindings
9 - compatible : Should be "xlnx,zynq-gpio-1.0" or
28 compatible = "xlnx,zynq-gpio-1.0";
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