Home
last modified time | relevance | path

Searched full:zbb (Results 1 – 15 of 15) sorted by relevance

/linux-6.8/arch/riscv/lib/
Dcsum.c44 * Zbb support saves 4 instructions, so not worth checking without in csum_ipv6_magic()
52 * Zbb is likely available when the kernel is compiled with Zbb in csum_ipv6_magic()
53 * support, so nop when Zbb is available and jump when Zbb is in csum_ipv6_magic()
63 .option arch,+zbb \n\ in csum_ipv6_magic()
161 * Zbb support saves 6 instructions, so not worth checking without in do_csum_with_alignment()
169 * Zbb is likely available when the kernel is compiled with Zbb in do_csum_with_alignment()
170 * support, so nop when Zbb is available and jump when Zbb is in do_csum_with_alignment()
182 .option arch,+zbb \n\ in do_csum_with_alignment()
197 .option arch,+zbb \n\ in do_csum_with_alignment()
248 * Zbb support saves 6 instructions, so not worth checking without in do_csum_no_alignment()
[all …]
Dstrcmp.S42 * Variant of strcmp using the ZBB extension if available.
50 .option arch,+zbb
Dstrlen.S34 * Variant of strlen using the ZBB extension if available
48 .option arch,+zbb
Dstrncmp.S47 * Variant of strncmp using the ZBB extension if available
53 .option arch,+zbb
/linux-6.8/arch/riscv/include/asm/
Dchecksum.h49 * ZBB only saves three instructions on 32-bit and five on 64-bit so not in ip_fast_csum()
65 .option arch,+zbb \n\ in ip_fast_csum()
73 .option arch,+zbb \n\ in ip_fast_csum()
Darch_hweight.h28 ".option arch,+zbb\n" in __arch_hweight32()
59 ".option arch,+zbb\n" in __arch_hweight64()
Dbitops.h47 ".option arch,+zbb\n" in variable__ffs()
103 ".option arch,+zbb\n" in variable__fls()
162 ".option arch,+zbb\n" in variable_ffs()
217 ".option arch,+zbb\n" in variable_fls()
/linux-6.8/arch/riscv/boot/dts/starfive/
Djh7110.dtsi32 riscv,isa-extensions = "i", "m", "a", "c", "zba", "zbb", "zicntr", "zicsr",
61 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
94 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
127 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
160 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
/linux-6.8/Documentation/devicetree/bindings/riscv/
Dextensions.yaml187 - const: zbb
189 The standard Zbb bit-manipulation extension for basic bit-manipulation
/linux-6.8/arch/riscv/
DKconfig581 bool "Zbb extension support for bit manipulation instructions"
587 Adds support to dynamically detect the presence of the ZBB
590 The Zbb extension provides instructions to accelerate a number
/linux-6.8/tools/testing/selftests/kvm/riscv/
Dget-reg-list.c423 KVM_ISA_EXT_ARR(ZBB), in isa_ext_single_id_to_str()
944 KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
/linux-6.8/Documentation/arch/riscv/
Dhwprobe.rst88 * :c:macro:`RISCV_HWPROBE_EXT_ZBB`: The Zbb extension is supported, as defined
/linux-6.8/arch/riscv/kernel/
Dsys_hwprobe.c96 EXT_KEY(ZBB); in hwprobe_isa_ext0()
Dcpufeature.c278 __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB),
/linux-6.8/arch/riscv/kvm/
Dvcpu_onereg.c44 KVM_ISA_EXT_ARR(ZBB),