| /linux-5.10/arch/arm/mm/ |
| D | proc-xscale.S | 3 * linux/arch/arm/mm/proc-xscale.S
9 * MMU functions for the Intel XScale CPUs
56 * Without this the XScale core exhibits cache eviction problems and no one
172 * XScale supports clock switching, but using idle mode support
415 define_cache_functions xscale
589 define_processor_functions xscale, dabort=v5t_early_abort, pabort=legacy_pabort, suspend=1
596 string cpu_80200_A0_A1_name, "XScale-80200 A0/A1"
597 string cpu_80200_name, "XScale-80200"
598 string cpu_80219_name, "XScale-80219"
599 string cpu_8032x_name, "XScale-IOP8032x Family"
[all …]
|
| D | copypage-xscale.c | 3 * linux/arch/arm/lib/copypage-xscale.S
7 * This handles the mini data cache, as found on SA11x0 and XScale
28 * XScale mini-dcache optimised copy_user_highpage
44 .arch xscale \n\ in mc_copy_user_page()
103 * XScale optimised clear_user_page
110 .arch xscale \n\ in xscale_mc_clear_user_highpage()
|
| D | fsr-2level.c | 32 { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */
34 { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */
36 { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */
|
| D | copypage-xsc3.c | 7 * Adapted for 3rd gen XScale core, no more mini-dcache
77 * XScale optimised clear_user_page
|
| /linux-5.10/arch/arm/kernel/ |
| D | xscale-cp0.c | 3 * linux/arch/arm/kernel/xscale-cp0.c
5 * XScale DSP and iWMMXt coprocessor context switching and handling
155 /* do not attempt to probe iwmmxt on non-xscale family CPUs */ in xscale_cp0_init()
164 pr_warn("CAUTION: XScale iWMMXt coprocessor detected, but kernel support is missing.\n"); in xscale_cp0_init()
166 pr_info("XScale iWMMXt coprocessor detected.\n"); in xscale_cp0_init()
171 pr_info("XScale DSP coprocessor detected.\n"); in xscale_cp0_init()
|
| D | Makefile | 73 obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
74 obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
75 obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
|
| /linux-5.10/drivers/clk/spear/ |
| D | spear1340_clock.c | 267 {.xscale = 5, .yscale = 122, .eq = 0},
269 {.xscale = 10, .yscale = 204, .eq = 0},
271 {.xscale = 4, .yscale = 25, .eq = 0},
273 {.xscale = 4, .yscale = 21, .eq = 0},
275 {.xscale = 5, .yscale = 18, .eq = 0},
277 {.xscale = 2, .yscale = 6, .eq = 0},
279 {.xscale = 5, .yscale = 12, .eq = 0},
281 {.xscale = 2, .yscale = 4, .eq = 0},
283 {.xscale = 5, .yscale = 18, .eq = 1},
285 {.xscale = 1, .yscale = 3, .eq = 1},
[all …]
|
| D | spear1310_clock.c | 255 {.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */
256 {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */
257 {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */
258 {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */
259 {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */
260 {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */
266 {.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */
267 {.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */
268 {.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */
269 {.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */
[all …]
|
| D | spear3xx_clock.c | 109 {.xscale = 1, .yscale = 81, .eq = 0}, /* 2.049 MHz */
110 {.xscale = 1, .yscale = 59, .eq = 0}, /* 2.822 MHz */
111 {.xscale = 2, .yscale = 81, .eq = 0}, /* 4.098 MHz */
112 {.xscale = 3, .yscale = 89, .eq = 0}, /* 5.644 MHz */
113 {.xscale = 4, .yscale = 81, .eq = 0}, /* 8.197 MHz */
114 {.xscale = 4, .yscale = 59, .eq = 0}, /* 11.254 MHz */
115 {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
116 {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
117 {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
118 {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
|
| D | spear6xx_clock.c | 93 {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
94 {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
95 {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
96 {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
|
| /linux-5.10/arch/arm/mach-omap1/ |
| D | lcd_dma.c | 60 int xscale, yscale; member
119 void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) in omap_set_lcd_dma_b1_scale() argument
125 lcd_dma.xscale = xscale; in omap_set_lcd_dma_b1_scale()
138 unsigned int xscale, yscale; in set_b1_regs() local
156 xscale = lcd_dma.xscale ? lcd_dma.xscale : 1; in set_b1_regs()
161 ((y) * vxres * yscale + (x) * xscale) * es) in set_b1_regs()
268 lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale)) in set_b1_regs()
319 lcd_dma.xscale = 0; in omap_request_lcd_dma()
|
| /linux-5.10/drivers/net/ethernet/xscale/ |
| D | Kconfig | 3 # Intel XScale IXP device configuration
7 bool "Intel XScale IXP devices"
16 the questions about XScale IXP devices. If you say Y, you will be
|
| D | Makefile | 3 # Makefile for the Intel XScale IXP device drivers.
|
| /linux-5.10/Documentation/arm/ |
| D | memory.rst | 25 For SA11xx and Xscale, this is used to
38 fffe0000 fffeffff XScale cache flush area. This is used
39 in proc-xscale.S to flush the whole data
40 cache. (XScale does not have TCM.)
|
| D | marvel.rst | 322 * This line of SoCs originates from the XScale family developed by
327 * Due to their XScale origin, these SoCs have virtually nothing in
378 * This line of SoCs originates from the XScale family developed by
382 * Due to their XScale origin, these SoCs have virtually nothing in
429 The XScale cores were designed by Intel, and shipped by Marvell in the older
431 and that evolved into Sheeva. The XScale and Feroceon cores were phased out
435 XScale 1
438 XScale 2
441 XScale 3
|
| /linux-5.10/arch/arm/mach-iop32x/ |
| D | pmu.c | 3 * PMU IRQ registration for the iop3xx xscale PMU families.
17 .name = "xscale-pmu",
|
| /linux-5.10/arch/arm/boot/compressed/ |
| D | head-xscale.S | 3 * linux/arch/arm/boot/compressed/head-xscale.S
5 * XScale specific tweaks. This is merged into head.S by the linker.
|
| /linux-5.10/arch/arm/boot/dts/ |
| D | pxa168.dtsi | 59 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
69 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
79 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| D | pxa910.dtsi | 71 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
81 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
91 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| D | intel-ixp4xx.dtsi | 3 * Device Tree file for Intel XScale Network Processors
24 compatible = "intel,xscale-uart";
|
| /linux-5.10/arch/arm/include/asm/ |
| D | cputype.h | 295 case 0x69052000: /* Intel XScale 1 */ in cpu_is_xscale_family()
296 case 0x69054000: /* Intel XScale 2 */ in cpu_is_xscale_family()
297 case 0x69056000: /* Intel XScale 3 */ in cpu_is_xscale_family()
298 case 0x56056000: /* Marvell XScale 3 */ in cpu_is_xscale_family()
|
| D | glue-df.h | 24 * xscale - ARMv5 with Thumb with Xscale extensions
|
| D | page.h | 37 * xscale - Xscale
|
| /linux-5.10/arch/arm/ |
| D | Makefile | 93 tune-$(CONFIG_CPU_XSCALE) =$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
94 tune-$(CONFIG_CPU_XSC3) =$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
95 tune-$(CONFIG_CPU_FEROCEON) =$(call cc-option,-mtune=marvell-f,-mtune=xscale)
|
| /linux-5.10/drivers/mtd/maps/ |
| D | pxa2xx-flash.c | 3 * Map driver for Intel XScale PXA2xx platforms.
140 MODULE_DESCRIPTION("MTD map driver for Intel XScale PXA2xx");
|