/linux/drivers/spi/ |
H A D | spi-cadence.c | 134 static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset) in cdns_spi_read() argument 136 return readl_relaxed(xspi->regs + offset); in cdns_spi_read() 139 static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val) in cdns_spi_write() argument 141 writel_relaxed(val, xspi->regs + offset); in cdns_spi_write() 146 * @xspi: Pointer to the cdns_spi structure 156 static void cdns_spi_init_hw(struct cdns_spi *xspi, bool is_target) in cdns_spi_init_hw() argument 163 if (xspi->is_decoded_cs) in cdns_spi_init_hw() 166 cdns_spi_write(xspi, CDNS_SPI_ER, CDNS_SPI_ER_DISABLE); in cdns_spi_init_hw() 167 cdns_spi_write(xspi, CDNS_SPI_IDR, CDNS_SPI_IXR_ALL); in cdns_spi_init_hw() 170 while (cdns_spi_read(xspi, CDNS_SPI_IS in cdns_spi_init_hw() 185 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_chipselect() local 216 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_config_clock_mode() local 259 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_config_clock_freq() local 297 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_setup_transfer() local 314 cdns_spi_process_fifo(struct cdns_spi * xspi,int ntx,int nrx) cdns_spi_process_fifo() argument 361 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_irq() local 434 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_transfer_one() local 474 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_prepare_transfer_hardware() local 493 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_unprepare_transfer_hardware() local 521 cdns_spi_detect_fifo_depth(struct cdns_spi * xspi) cdns_spi_detect_fifo_depth() argument 541 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_target_abort() local 564 struct cdns_spi *xspi; cdns_spi_probe() local 699 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_remove() local 738 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_resume() local 755 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_runtime_resume() local 784 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_runtime_suspend() local [all...] |
H A D | spi-cadence-xspi.c | 2 // Cadence XSPI flash controller driver 27 #define CDNS_XSPI_NAME "cadence-xspi" 31 * configure XSPI controller pin-strap settings 568 "Incorrect XSPI magic number: %x, expected: %x\n", in cdns_xspi_controller_init() 1273 .compatible = "cdns,xspi-nor", 1277 .compatible = "marvell,cn10-xspi-nor", 1294 MODULE_DESCRIPTION("Cadence XSPI Controller Driver");
|
H A D | Kconfig | 293 tristate "Cadence XSPI controller" 297 Enable support for the Cadence XSPI Flash controller. 299 Cadence XSPI is a specialized controller for connecting an SPI 301 device with a Cadence XSPI controller and want to access the
|
H A D | spi-fsl-dspi.c | 367 * individually (in XSPI mode) 812 * dspi_pushr_cmd_write with XSPI mode. As for how much in advance? One in dspi_pushr_cmd_write() 934 * Update CTAR here (code is common for XSPI and DMA modes). in dspi_setup_accel() 935 * We will update CTARE in the portion specific to XSPI, when we in dspi_setup_accel() 952 /* In XSPI mode each 32-bit word occupies 2 TX FIFO entries */ in dspi_fifo_write()
|
/linux/drivers/memory/ |
H A D | renesas-rpc-if.c | 22 #include "renesas-xspi-if-regs.h" 76 u8 addr_nbytes; /* Specified for xSPI */ 77 u32 proto; /* Specified for xSPI */ 180 struct rpcif_priv *xspi = context; in xspi_reg_read() local 182 *val = readl(xspi->base + reg); in xspi_reg_read() 188 struct rpcif_priv *xspi = context; in xspi_reg_write() local 190 writel(val, xspi->base + reg); in xspi_reg_write() 212 rpcif->xspi = rpc->info->type == XSPI_RZ_G3E; in rpcif_sw_init() 288 static int xspi_hw_init_impl(struct rpcif_priv *xspi, bool hyperflash) in xspi_hw_init_impl() argument 292 ret = reset_control_reset(xspi in xspi_hw_init_impl() 438 xspi_prepare_impl(struct rpcif_priv * xspi,const struct rpcif_op * op,u64 * offs,size_t * len) xspi_prepare_impl() argument 623 xspi_manual_xfer_impl(struct rpcif_priv * xspi) xspi_manual_xfer_impl() argument 850 xspi_dirmap_read_impl(struct rpcif_priv * xspi,u64 offs,size_t len,void * buf) xspi_dirmap_read_impl() argument 917 struct rpcif_priv *xspi = dev_get_drvdata(dev); xspi_dirmap_write() local [all...] |
H A D | renesas-xspi-if-regs.h | 3 * RZ xSPI Interface Registers Definitions 13 /* xSPI Wrapper Configuration Register */ 16 /* xSPI Bridge Configuration Register */ 23 /* xSPI Command Map Configuration Register 0 CS0 */ 28 /* xSPI Command Map Configuration Register 1 CS0 */ 34 /* xSPI Command Map Configuration Register 2 CS0 */ 40 /* xSPI Link I/O Configuration Register CS0 */ 47 /* xSPI Bridge Map Control Register 0 */ 51 /* xSPI Bridge Map Control Register 1 */ 55 /* xSPI Comman [all...] |
/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | renesas,rzg3e-xspi.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml# 7 title: Renesas Expanded Serial Peripheral Interface (xSPI) 13 Renesas xSPI allows a SPI flash connected to the SoC to be accessed via 16 The flash chip itself should be represented by a subnode of the XSPI node. 27 - const: renesas,r9a09g047-xspi # RZ/G3E 31 - renesas,r9a09g056-xspi # RZ/V2N 32 - renesas,r9a09g057-xspi # RZ/V2H(P) 33 - const: renesas,r9a09g047-xspi 37 - description: xSPI registers 82 renesas,xspi [all...] |
/linux/include/dt-bindings/memory/ |
H A D | tegra234-mc.h | 289 /* XSPI writes */ 339 /* XSPI client */ 341 /* XSPI writes */ 343 /* XSPI client */
|
/linux/Documentation/devicetree/bindings/soc/renesas/ |
H A D | renesas,r9a09g057-sys.yaml | 18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
|
/linux/include/memory/ |
H A D | renesas-rpc-if.h | 71 bool xspi; member
|
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx95/sys/ |
H A D | metrics.json | 347 "BriefDescription": "bytes of xspi read from ddr", 348 "MetricName": "imx95_ddr_read.xspi", 355 "BriefDescription": "bytes of xspi write to ddr", 356 "MetricName": "imx95_ddr_write.xspi",
|
/linux/arch/arm64/boot/dts/renesas/ |
H A D | r9a09g056.dtsi | 209 xspi: spi@11030000 { label 210 compatible = "renesas,r9a09g056-xspi", "renesas,r9a09g047-xspi";
|
H A D | r9a09g057.dtsi | 283 xspi: spi@11030000 { label 284 compatible = "renesas,r9a09g057-xspi", "renesas,r9a09g047-xspi";
|
H A D | rzg3e-smarc-som.dtsi | 369 &xspi {
|
H A D | r9a09g057h44-rzv2h-evk.dts | 440 &xspi {
|
H A D | r9a09g056n48-rzv2n-evk.dts | 399 &xspi {
|
H A D | r9a09g047.dtsi | 283 xspi: spi@11030000 { label 284 compatible = "renesas,r9a09g047-xspi";
|
/linux/drivers/mtd/spi-nor/ |
H A D | spansion.c | 718 * On older versions of the flash the xSPI Profile 1.0 table has the in s28hx_t_post_sfdp_fixup() 729 * Since xSPI Page Program opcode is backward compatible with in s28hx_t_post_sfdp_fixup() 736 * The xSPI Profile 1.0 table advertises the number of additional in s28hx_t_post_sfdp_fixup()
|
H A D | sfdp.c | 24 #define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */ 1106 * Since xSPI Page Program opcode is backward compatible with in spi_nor_parse_4bait() 1154 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table 1228 * Page Program is "Required Command" in the xSPI Profile 1.0. Update in spi_nor_parse_profile1()
|
H A D | core.c | 2701 * Since xSPI Page Program opcode is backward compatible with in spi_nor_no_sfdp_init_params()
|