| /linux-6.8/Documentation/devicetree/bindings/mfd/ ! |
| D | qcom,tcsr.yaml | 4 $id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#
20 - qcom,msm8976-tcsr
21 - qcom,msm8998-tcsr
22 - qcom,qcs404-tcsr
23 - qcom,sc7180-tcsr
24 - qcom,sc7280-tcsr
25 - qcom,sc8280xp-tcsr
26 - qcom,sdm630-tcsr
27 - qcom,sdm845-tcsr
28 - qcom,sdx55-tcsr
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/hwlock/ ! |
| D | qcom-hwspinlock.yaml | 21 - qcom,tcsr-mutex
24 - qcom,apq8084-tcsr-mutex
25 - qcom,ipq6018-tcsr-mutex
26 - qcom,msm8226-tcsr-mutex
27 - qcom,msm8994-tcsr-mutex
28 - const: qcom,tcsr-mutex
31 - qcom,msm8974-tcsr-mutex
32 - const: qcom,tcsr-mutex
51 compatible = "qcom,tcsr-mutex";
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| /linux-6.8/Documentation/devicetree/bindings/clock/ ! |
| D | qcom,sm8550-tcsr.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
7 title: Qualcomm TCSR Clock Controller on SM8550
13 Qualcomm TCSR clock control module provides the clocks, resets and
17 - include/dt-bindings/clock/qcom,sm8550-tcsr.h
18 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
24 - qcom,sm8550-tcsr
25 - qcom,sm8650-tcsr
52 compatible = "qcom,sm8550-tcsr", "syscon";
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| /linux-6.8/drivers/soc/qcom/ ! |
| D | qcom_gsbi.c | 114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
120 { .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960},
121 { .compatible = "qcom,tcsr-msm8660", .data = &config_msm8660},
145 /* get the tcsr node and setup the config and regmap */ in gsbi_probe()
146 gsbi->tcsr = syscon_regmap_lookup_by_phandle(node, "syscon-tcsr"); in gsbi_probe()
148 if (!IS_ERR(gsbi->tcsr)) { in gsbi_probe()
149 tcsr_node = of_parse_phandle(node, "syscon-tcsr", 0); in gsbi_probe()
155 dev_warn(&pdev->dev, "no matching TCSR\n"); in gsbi_probe()
[all …]
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| /linux-6.8/include/clocksource/ ! |
| D | timer-xilinx.h | 51 * @tcsr: The value of the TCSR register for this counter
59 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr,
66 * @tcsr: The value of TCSR for this counter
71 u32 tlr, u32 tcsr);
|
| /linux-6.8/arch/arm/boot/dts/qcom/ ! |
| D | qcom-msm8660.dtsi | 134 syscon-tcsr = <&tcsr>;
160 syscon-tcsr = <&tcsr>;
186 syscon-tcsr = <&tcsr>;
221 syscon-tcsr = <&tcsr>;
255 syscon-tcsr = <&tcsr>;
280 syscon-tcsr = <&tcsr>;
430 tcsr: syscon@1a400000 { label
431 compatible = "qcom,tcsr-msm8660", "syscon";
|
| D | qcom-mdm9615.dtsi | 206 syscon-tcsr = <&tcsr>;
230 syscon-tcsr = <&tcsr>;
324 tcsr: syscon@1a400000 { label
325 compatible = "qcom,tcsr-mdm9615", "syscon";
|
| D | qcom-ipq8064.dtsi | 781 syscon-tcsr = <&tcsr>;
820 syscon-tcsr = <&tcsr>;
857 syscon-tcsr = <&tcsr>;
893 syscon-tcsr = <&tcsr>;
936 syscon-tcsr = <&tcsr>;
995 syscon-tcsr = <&tcsr>;
1034 tcsr: syscon@1a400000 { label
1035 compatible = "qcom,tcsr-ipq8064", "syscon";
|
| D | qcom-msm8960.dtsi | 245 syscon-tcsr = <&tcsr>;
303 tcsr: syscon@1a400000 { label
304 compatible = "qcom,tcsr-msm8960", "syscon";
|
| /linux-6.8/Documentation/devicetree/bindings/soc/qcom/ ! |
| D | qcom,gsbi.yaml | 57 syscon-tcsr:
60 Phandle of TCSR syscon node.Required if child uses dma.
106 syscon-tcsr = <&tcsr>;
|
| /linux-6.8/drivers/hwspinlock/ ! |
| D | qcom_hwspinlock.c | 116 { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex },
117 { .compatible = "qcom,apq8084-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
118 { .compatible = "qcom,msm8226-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
119 { .compatible = "qcom,msm8974-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
120 { .compatible = "qcom,msm8994-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
|
| /linux-6.8/drivers/phy/qualcomm/ ! |
| D | phy-qcom-qusb2.c | 276 /* offset to PHY_CLK_SCHEME register in TCSR map */
418 * @tcsr: TCSR syscon register map
438 struct regmap *tcsr; member
796 * register in the TCSR so, if there's none, use the default in qusb2_phy_init()
807 if (qphy->tcsr) { in qusb2_phy_init()
808 ret = regmap_read(qphy->tcsr, qphy->cfg->clk_scheme_offset, in qusb2_phy_init()
1009 qphy->tcsr = syscon_regmap_lookup_by_phandle(dev->of_node, in qusb2_phy_probe()
1010 "qcom,tcsr-syscon"); in qusb2_phy_probe()
1011 if (IS_ERR(qphy->tcsr)) { in qusb2_phy_probe()
1012 dev_dbg(dev, "failed to lookup TCSR regmap\n"); in qusb2_phy_probe()
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/pci/ ! |
| D | qcom,pcie-ep.yaml | 49 description: Reference to a syscon representing TCSR followed by the two
55 - description: Syscon to TCSR system registers
206 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
|
| /linux-6.8/drivers/pmdomain/qcom/ ! |
| D | cpr.c | 236 struct regmap *tcsr; member
392 static void cpr_set_acc(struct regmap *tcsr, struct fuse_corner *f, in cpr_set_acc() argument
400 regmap_multi_reg_write(tcsr, f->accs, f->num_accs); in cpr_set_acc()
403 regmap_multi_reg_write(tcsr, f->accs, f->num_accs); in cpr_set_acc()
413 if (drv->tcsr && dir == DOWN) in cpr_pre_voltage()
414 cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); in cpr_pre_voltage()
425 if (drv->tcsr && dir == UP) in cpr_post_voltage()
426 cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); in cpr_post_voltage()
1532 regmap_multi_reg_write(drv->tcsr, acc_desc->config, in cpr_pd_attach_dev()
1537 regmap_update_bits(drv->tcsr, acc_desc->enable_reg, in cpr_pd_attach_dev()
[all …]
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| /linux-6.8/Documentation/arch/mips/ ! |
| D | ingenic-tcu.rst | 19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
|
| /linux-6.8/drivers/pwm/ ! |
| D | pwm-xilinx.c | 34 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr, in xilinx_timer_tlr_cycles() argument
39 if (tcsr & TCSR_UDT) in xilinx_timer_tlr_cycles()
45 u32 tlr, u32 tcsr) in xilinx_timer_get_period() argument
49 if (tcsr & TCSR_UDT) in xilinx_timer_get_period()
|
| /linux-6.8/Documentation/devicetree/bindings/remoteproc/ ! |
| D | qcom,qcs404-cdsp-pil.yaml | 83 Phandle reference to a syscon representing TCSR followed by the
154 qcom,halt-regs = <&tcsr 0x19004>;
|
| /linux-6.8/drivers/clk/qcom/ ! |
| D | tcsrcc-sm8650.c | 14 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
151 { .compatible = "qcom,sm8650-tcsr" },
|
| D | tcsrcc-sm8550.c | 14 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
156 { .compatible = "qcom,sm8550-tcsr" },
|
| /linux-6.8/drivers/net/ethernet/marvell/mvpp2/ ! |
| D | mvpp2_tai.c | 242 u32 tcsr; in mvpp22_tai_gettimex64() local
260 tcsr = readl(base + MVPP22_TAI_TCSR); in mvpp22_tai_gettimex64()
261 if (tcsr & TCSR_CAPTURE_1_VALID) { in mvpp22_tai_gettimex64()
264 } else if (tcsr & TCSR_CAPTURE_0_VALID) { in mvpp22_tai_gettimex64()
|
| /linux-6.8/drivers/clk/ingenic/ ! |
| D | tcu.c | 130 WARN_ONCE(ret < 0, "Unable to read TCSR %d", tcu_clk->idx); in ingenic_tcu_get_parent()
146 WARN_ONCE(ret < 0, "Unable to update TCSR %d", tcu_clk->idx); in ingenic_tcu_set_parent()
163 WARN_ONCE(ret < 0, "Unable to read TCSR %d", tcu_clk->idx); in ingenic_tcu_recalc_rate()
212 WARN_ONCE(ret < 0, "Unable to update TCSR %d", tcu_clk->idx); in ingenic_tcu_set_rate()
|
| /linux-6.8/arch/arm64/boot/dts/qcom/ ! |
| D | ipq5332.dtsi | 83 qcom,dload-mode = <&tcsr 0x6100>;
220 compatible = "qcom,tcsr-mutex";
225 tcsr: syscon@1937000 { label
226 compatible = "qcom,tcsr-ipq5332", "syscon";
|
| /linux-6.8/Documentation/devicetree/bindings/firmware/ ! |
| D | qcom,scm.yaml | 108 - description: phandle to TCSR hardware block
110 description: TCSR hardware block
|
| /linux-6.8/include/dt-bindings/clock/ ! |
| D | qcom,sc8280xp-lpasscc.h | 14 /* LPASS TCSR */
|
| D | qcom,sm8550-tcsr.h | 10 /* TCSR CC clocks */
|