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/linux/drivers/platform/x86/lenovo/
H A Dthink-lmi.c41 * Description: Change the BIOS setting to the desired value using the SetBiosSetting
107 * This is particularly useful for simplifying setting passwords.
333 static int tlmi_opcode_setting(char *setting, const char *value) in tlmi_opcode_setting() argument
338 opcode_str = kasprintf(GFP_KERNEL, "%s:%s;", setting, value); in tlmi_opcode_setting()
389 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); in is_enabled_show() local
391 return sysfs_emit(buf, "%d\n", setting->pwd_enabled || setting->cert_installed); in is_enabled_show()
400 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); in current_password_store() local
405 if (pwdlen && ((pwdlen < setting->minlen) || (pwdlen > setting in current_password_store()
420 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); new_password_store() local
510 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); min_password_length_show() local
520 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); max_password_length_show() local
529 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); mechanism_show() local
540 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); encoding_show() local
549 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); encoding_store() local
566 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); kbdlang_show() local
575 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); kbdlang_store() local
593 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); role_show() local
602 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); index_show() local
611 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); index_store() local
630 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); level_show() local
639 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); level_store() local
653 cert_command(struct tlmi_pwd_setting * setting,const char * arg1,const char * arg2) cert_command() argument
694 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); certificate_thumbprint_show() local
727 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); cert_to_password_store() local
772 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); certificate_store() local
868 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); signature_store() local
895 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); save_signature_store() local
921 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); auth_attr_is_visible() local
984 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); display_name_show() local
991 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); current_value_show() local
1015 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); possible_values_show() local
1023 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); type_show() local
1038 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); current_value_store() local
1173 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); attr_is_visible() local
1198 struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj); tlmi_attr_setting_release() local
1206 struct tlmi_pwd_setting *setting = to_tlmi_pwd_setting(kobj); tlmi_pwd_setting_release() local
1591 struct tlmi_attr_setting *setting; tlmi_analyze() local
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/linux/drivers/staging/fbtft/
H A Dfb_upd161704.c37 /* y-setting */ in init_display()
38 write_reg(par, 0x0024, 0x007B); /* amplitude setting */ in init_display()
40 write_reg(par, 0x0025, 0x003B); /* amplitude setting */ in init_display()
41 write_reg(par, 0x0026, 0x0034); /* amplitude setting */ in init_display()
43 write_reg(par, 0x0027, 0x0004); /* amplitude setting */ in init_display()
44 write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */ in init_display()
46 write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */ in init_display()
61 /* Power supply setting */ in init_display()
62 write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ in init_display()
64 write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */ in init_display()
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/linux/drivers/clk/meson/
H A Dclk-dualdiv.c52 struct meson_clk_dualdiv_param setting; in meson_clk_dualdiv_recalc_rate() local
54 setting.dual = meson_parm_read(clk->map, &dualdiv->dual); in meson_clk_dualdiv_recalc_rate()
55 setting.n1 = meson_parm_read(clk->map, &dualdiv->n1) + 1; in meson_clk_dualdiv_recalc_rate()
56 setting.m1 = meson_parm_read(clk->map, &dualdiv->m1) + 1; in meson_clk_dualdiv_recalc_rate()
57 setting.n2 = meson_parm_read(clk->map, &dualdiv->n2) + 1; in meson_clk_dualdiv_recalc_rate()
58 setting.m2 = meson_parm_read(clk->map, &dualdiv->m2) + 1; in meson_clk_dualdiv_recalc_rate()
60 return __dualdiv_param_to_rate(parent_rate, &setting); in meson_clk_dualdiv_recalc_rate()
94 const struct meson_clk_dualdiv_param *setting; in meson_clk_dualdiv_determine_rate() local
96 setting = __dualdiv_get_setting(req->rate, req->best_parent_rate, in meson_clk_dualdiv_determine_rate()
98 if (setting) in meson_clk_dualdiv_determine_rate()
113 const struct meson_clk_dualdiv_param *setting = meson_clk_dualdiv_set_rate() local
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/linux/drivers/media/i2c/ccs/
H A Dccs-quirk.c55 { 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
56 { 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
57 { 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
58 { 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
59 { 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
60 { 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
61 { 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
62 { 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
63 { 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
64 { 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
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/linux/drivers/gpu/drm/panel/
H A Dpanel-orisetech-otm8009a.c27 #define MCS_PANSET 0xB3A6 /* Panel Type Setting */
28 #define MCS_SD_CTRL 0xC0A2 /* Source Driver Timing Setting */
31 #define MCS_RGB_VID_SET 0xC1A1 /* RGB Video Mode Setting */
34 #define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
35 #define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
36 #define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
37 #define MCS_PANCTRLSET1 0xCB80 /* Panel Control Setting 1 */
38 #define MCS_PANCTRLSET2 0xCB90 /* Panel Control Setting 2 */
39 #define MCS_PANCTRLSET3 0xCBA0 /* Panel Control Setting 3 */
40 #define MCS_PANCTRLSET4 0xCBB0 /* Panel Control Setting
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/linux/drivers/memory/
H A Dda8xx-ddrctl.c70 da8xx_ddrctl_match_knob(const struct da8xx_ddrctl_setting *setting) in da8xx_ddrctl_match_knob() argument
78 if (strcmp(knob->name, setting->name) == 0) in da8xx_ddrctl_match_knob()
103 const struct da8xx_ddrctl_setting *setting; in da8xx_ddrctl_probe() local
111 setting = da8xx_ddrctl_get_board_settings(); in da8xx_ddrctl_probe()
112 if (!setting) { in da8xx_ddrctl_probe()
123 for (; setting->name; setting++) { in da8xx_ddrctl_probe()
124 knob = da8xx_ddrctl_match_knob(setting); in da8xx_ddrctl_probe()
127 "no such config option: %s\n", setting->name); in da8xx_ddrctl_probe()
140 reg |= setting in da8xx_ddrctl_probe()
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/linux/Documentation/arch/riscv/
H A Dvector.rst34 enablement status on execve(). The system-wide default setting can be
49 enablement status of current thread, and the setting at bit[3:2] takes place
50 at next execve(). bit[4] defines the inheritance mode of the setting in
57 but the current enablement status is not off. Setting
62 Vector enablement setting for the calling thread at the next execve()
68 mode for the setting at PR_RISCV_V_VSTATE_CTRL_NEXT_MASK. If the bit
69 is set then the following execve() will not clear the setting in both
71 This setting persists across changes in the system-wide default value.
81 * A valid setting for PR_RISCV_V_VSTATE_CTRL_CUR_MASK takes place
86 * Every successful call overwrites a previous setting fo
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/linux/drivers/pinctrl/
H A Dpinmux.h41 struct pinctrl_setting *setting);
42 void pinmux_free_setting(const struct pinctrl_setting *setting);
43 int pinmux_enable_setting(const struct pinctrl_setting *setting);
44 void pinmux_disable_setting(const struct pinctrl_setting *setting);
85 struct pinctrl_setting *setting) in pinmux_map_to_setting() argument
90 static inline void pinmux_free_setting(const struct pinctrl_setting *setting) in pinmux_free_setting() argument
94 static inline int pinmux_enable_setting(const struct pinctrl_setting *setting) in pinmux_enable_setting() argument
99 static inline void pinmux_disable_setting(const struct pinctrl_setting *setting) in pinmux_disable_setting() argument
109 const struct pinctrl_setting *setting);
121 const struct pinctrl_setting *setting) in pinmux_show_setting() argument
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H A Dpinmux.c350 struct pinctrl_setting *setting) in pinmux_map_to_setting() argument
352 struct pinctrl_dev *pctldev = setting->pctldev; in pinmux_map_to_setting()
370 setting->data.mux.func = ret; in pinmux_map_to_setting()
372 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, in pinmux_map_to_setting()
404 setting->data.mux.group = ret; in pinmux_map_to_setting()
409 void pinmux_free_setting(const struct pinctrl_setting *setting) in pinmux_free_setting() argument
414 int pinmux_enable_setting(const struct pinctrl_setting *setting) in pinmux_enable_setting() argument
416 struct pinctrl_dev *pctldev = setting->pctldev; in pinmux_enable_setting()
426 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, in pinmux_enable_setting()
434 setting in pinmux_enable_setting()
497 pinmux_disable_setting(const struct pinctrl_setting * setting) pinmux_disable_setting() argument
678 pinmux_show_setting(struct seq_file * s,const struct pinctrl_setting * setting) pinmux_show_setting() argument
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/linux/include/uapi/linux/
H A Dcapability.h136 shall match the file owner ID when setting the S_ISUID and S_ISGID
138 supplementary group IDs) shall match the file owner ID when setting
193 /* Allow setting debug option on sockets */
195 /* Allow setting arbitrary process / process group ownership on
198 /* Allow setting TOS (type of service) */
199 /* Allow setting promiscuous mode */
246 /* Allow setting the domainname */
247 /* Allow setting the hostname */
248 /* Allow mount() and umount(), setting up new smb connection */
261 /* Allow setting readahea
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H A Ddm-log-userspace.h27 * User-space begins by setting up the communication link (error checking
68 * dm_ulog_request to the kernel - setting the 'error' field, filling the
69 * data field with the log device if necessary, and setting 'data_size'
88 * dm_ulog_request to the kernel - setting the 'error' field and clearing
107 * dm_ulog_request to the kernel - setting the 'error' field and
126 * dm_ulog_request to the kernel - setting the 'error' field and
145 * dm_ulog_request to the kernel - setting the 'error' field and
164 * dm_ulog_request to the kernel - setting the 'error' field appropriately.
182 * 1 (clean), setting 'data_size' and 'error' appropriately.
220 * dm_ulog_request to the kernel - setting th
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/linux/drivers/media/platform/samsung/s5p-g2d/
H A Dg2d-regs.h22 /* Parameter Setting Registers (Rotate & Direction) */
27 /* Parameter Setting Registers (Src) */
38 /* Parameter Setting Registers (Dest) */
46 /* Parameter Setting Registers (Pattern) */
53 /* Parameter Setting Registers (Mask) */
57 /* Parameter Setting Registers (Clipping Window) */
62 /* Parameter Setting Registers (ROP & Alpha Setting) */
67 /* Parameter Setting Registers (Color) */
72 /* Parameter Setting Register
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/linux/Documentation/devicetree/bindings/leds/backlight/
H A Darcxcnn_bl.txt14 - arc,led-config-0: setting for register ILED_CONFIG_0
15 - arc,led-config-1: setting for register ILED_CONFIG_1
16 - arc,dim-freq: PWM mode frequence setting (bits [3:0] used)
17 - arc,comp-config: setting for register CONFIG_COMP
18 - arc,filter-config: setting for register FILTER_CONFIG
19 - arc,trim-config: setting for register IMAXTUNE
/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Dsfb.json4 "name": "Create SFB with default setting",
25 "name": "Create SFB with rehash setting",
46 "name": "Create SFB with db setting",
67 "name": "Create SFB with limit setting",
88 "name": "Create SFB with max setting",
109 "name": "Create SFB with target setting",
130 "name": "Create SFB with increment setting",
151 "name": "Create SFB with decrement setting",
172 "name": "Create SFB with penalty_rate setting",
193 "name": "Create SFB with penalty_burst setting",
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H A Dhtb.json4 "name": "Create HTB with default setting",
25 "name": "Create HTB with default-N setting",
46 "name": "Create HTB with r2q setting",
67 "name": "Create HTB with direct_qlen setting",
88 "name": "Create HTB with class rate and burst setting",
110 "name": "Create HTB with class mpu setting",
132 "name": "Create HTB with class prio setting",
154 "name": "Create HTB with class ceil setting",
176 "name": "Create HTB with class cburst setting",
198 "name": "Create HTB with class mtu setting",
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H A Dplug.json4 "name": "Create PLUG with default setting",
25 "name": "Create PLUG with block setting",
46 "name": "Create PLUG with release setting",
67 "name": "Create PLUG with release_indefinite setting",
88 "name": "Create PLUG with limit setting",
130 "name": "Replace PLUG with limit setting",
152 "name": "Change PLUG with limit setting",
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.h119 * - For special pins' pull up/down setting which resides in same register
121 * @offset: The offset of special pull up/down setting register.
144 * struct mtk_pin_ies_set - For special pins' ies and smt setting.
147 * @offset: The offset of special setting register.
148 * @bit: The bit of special setting register.
196 * @spec_ies: Special pin setting for input enable
198 * @spec_pupd: Special pull up/down setting
200 * @spec_smt: Special pin setting for schmitt
202 * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
203 * these pins' pull setting ar
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/linux/drivers/interconnect/imx/
H A Dimx.c25 const struct imx_icc_noc_setting *setting; member
47 if (node_data->setting && node->peak_bw) { in imx_icc_node_set()
48 base = node_data->setting->reg + node_data->imx_provider->noc_base; in imx_icc_node_set()
49 if (node_data->setting->mode == IMX_NOC_MODE_FIXED) { in imx_icc_node_set()
50 prio = node_data->setting->prio_level; in imx_icc_node_set()
53 writel(node_data->setting->mode, base + IMX_NOC_MODE_REG); in imx_icc_node_set()
54 writel(node_data->setting->ext_control, base + IMX_NOC_EXT_CTL_REG); in imx_icc_node_set()
56 node_data->desc->name, node_data->setting->mode, prio, in imx_icc_node_set()
57 node_data->setting->ext_control); in imx_icc_node_set()
58 } else if (node_data->setting in imx_icc_node_set()
164 imx_icc_node_add(struct imx_icc_provider * imx_provider,const struct imx_icc_node_desc * node_desc,const struct imx_icc_noc_setting * setting) imx_icc_node_add() argument
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx-asxx-defs.h65 uint64_t setting:5; member
67 uint64_t setting:5;
78 uint64_t setting:5; member
80 uint64_t setting:5;
159 uint64_t setting:5; member
161 uint64_t setting:5;
213 uint64_t setting:5; member
215 uint64_t setting:5;
336 uint64_t setting:5; member
338 uint64_t setting
349 uint64_t setting:5; global() member
362 uint64_t setting:5; global() member
449 uint64_t setting:5; global() member
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/linux/Documentation/devicetree/bindings/regulator/
H A Dregulator.yaml133 limit setting can be omitted.
139 that detection should be enabled but limit setting can be omitted.
146 be enabled but limit setting can be omitted.
152 limit setting can be omitted. Limit is given as microvolt offset from
159 that detection should be enabled but limit setting can be omitted. Limit
167 be enabled but limit setting can be omitted. Limit is given as microvolt
174 limit setting can be omitted. Limit is given as microvolt offset from
181 that detection should be enabled but limit setting can be omitted. Limit
189 be enabled but limit setting can be omitted. Limit is given as microvolt
204 limit setting ca
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/linux/Documentation/devicetree/bindings/iio/light/
H A Dsharp,gp2ap002.yaml46 Hysteresis setting for "far" object detection, this setting is
47 device-unique and adjust the optical setting for proximity detection
53 Hysteresis setting for "close" object detection, this setting is
54 device-unique and adjust the optical setting for proximity detection
/linux/include/linux/platform_data/x86/
H A Dpwm-lpss.h25 * 4. Enable the PWM output by setting PWM Enable.
33 * + After setting PWMCTRL register's SW update bit, hardware automatically
35 * setting of PWM enable is typically done via read-modify-write of the PWMCTRL
36 * register. If there is no/little delay between setting software update bit
37 * and setting enable bit via read-modify-write, it is possible that the read
41 * to be 0 after setting the enable bit to 1. To avoid this race condition,
/linux/sound/soc/codecs/
H A Dtlv320aic31xx.h56 #define AIC31XX_DOSRMSB AIC31XX_REG(0, 13) /* DAC OSR setting register 1, MSB value */
57 #define AIC31XX_DOSRLSB AIC31XX_REG(0, 14) /* DAC OSR setting register 2, LSB value */
59 #define AIC31XX_NADC AIC31XX_REG(0, 18) /* Clock setting register 8, PLL */
60 #define AIC31XX_MADC AIC31XX_REG(0, 19) /* Clock setting register 9, PLL */
62 #define AIC31XX_CLKOUTMUX AIC31XX_REG(0, 25) /* Clock setting register 9, Multiplexers */
63 #define AIC31XX_CLKOUTMVAL AIC31XX_REG(0, 26) /* Clock setting register 10, CLOCKOUT M divider value */
64 #define AIC31XX_IFACE1 AIC31XX_REG(0, 27) /* Audio Interface Setting Register 1 */
66 #define AIC31XX_IFACE2 AIC31XX_REG(0, 29) /* Audio Interface Setting Register 2 */
67 #define AIC31XX_BCLKN AIC31XX_REG(0, 30) /* Clock setting register 11, BCLK N Divider */
68 #define AIC31XX_IFACESEC1 AIC31XX_REG(0, 31) /* Audio Interface Setting Registe
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/linux/block/
H A Dbadblocks.c24 * setting range can be acked or unacked. And the setting range may merge,
27 * more complicated when the setting range covers multiple already set bad block
32 * for setting a large range of bad blocks, we can handle it by dividing the
39 * When setting a range of bad blocks to the bad table, the simplified situations
41 * prefix E, and the setting bad blocks range is naming with prefix S)
43 * 1) A setting range is not overlapped or adjacent to any other already set bad
52 * free slot from the bad blocks table to mark the setting range S. The
57 * 2) A setting range starts exactly at a start LBA of an already set bad blocks
59 * 2.1) The setting rang
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/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h33 * @mpp_get: (optional) special function to get mpp setting
34 * @mpp_set: (optional) special function to set mpp setting
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
63 * @val: ctrl setting value
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
65 * @subname: (optional) additional ctrl setting name, e.g. rts, cts
74 * The name will be used to switch to this setting in DT description, e.g.
82 * determine if a setting is available on the current SoC revision.
120 * setting and allows to distinguish between different revisions of one SoC.

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