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/linux-6.8/arch/powerpc/mm/book3s64/
Dsubpage_prot.c94 u32 **spm, *spp; in subpage_prot_clear() local
111 spm = spt->low_prot; in subpage_prot_clear()
113 spm = spt->protptrs[addr >> SBP_L3_SHIFT]; in subpage_prot_clear()
114 if (!spm) in subpage_prot_clear()
117 spp = spm[(addr >> SBP_L2_SHIFT) & (SBP_L2_COUNT - 1)]; in subpage_prot_clear()
189 u32 **spm, *spp; in SYSCALL_DEFINE3() local
237 spm = spt->low_prot; in SYSCALL_DEFINE3()
239 spm = spt->protptrs[addr >> SBP_L3_SHIFT]; in SYSCALL_DEFINE3()
240 if (!spm) { in SYSCALL_DEFINE3()
241 spm = (u32 **)get_zeroed_page(GFP_KERNEL); in SYSCALL_DEFINE3()
[all …]
/linux-6.8/drivers/cpuidle/
Dcpuidle-qcom-spm.c20 #include <soc/qcom/spm.h>
29 struct spm_driver_data *spm; member
51 * if the SPM mode is not reset, then we may accidently power down the in qcom_cpu_spc()
66 return CPU_PM_CPU_IDLE_ENTER_PARAM(qcom_cpu_spc, idx, data->spm); in spm_enter_idle_state()
112 data->spm = dev_get_drvdata(&pdev->dev); in spm_cpuidle_register()
113 if (!data->spm) in spm_cpuidle_register()
152 .name = "qcom-spm-cpuidle",
182 /* Make sure there is actually any CPU managed by the SPM */ in qcom_spm_cpuidle_init()
186 pdev = platform_device_register_simple("qcom-spm-cpuidle", in qcom_spm_cpuidle_init()
DKconfig.arm120 bool "CPU Idle Driver for Qualcomm Subsystem Power Manager (SPM)"
130 The Subsystem Power Manager (SPM) controls low power modes for the
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi528 spm: power-controller { label
961 power-domains = <&spm MT8195_POWER_DOMAIN_ADSP>;
985 power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
1147 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
1281 power-domains = <&spm MT8195_POWER_DOMAIN_ETHER>;
1533 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_MAC_P0>;
1585 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_MAC_P1>;
1893 power-domains = <&spm MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>;
1957 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_PHY>;
1982 power-domains = <&spm MT8195_POWER_DOMAIN_MFG2>,
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Dmt8173.dtsi450 spm: power-controller { label
856 power-domains = <&spm MT8173_POWER_DOMAIN_AUDIO>;
932 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
947 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
990 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1006 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1016 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1024 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1031 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1038 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
[all …]
Dmt6795.dtsi295 spm: power-controller { label
431 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
722 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
736 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
746 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
756 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
766 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
776 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
786 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
796 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
[all …]
Dmt8192.dtsi502 spm: power-controller { label
984 power-domains = <&spm MT8192_POWER_DOMAIN_AUDIO>;
1426 power-domains = <&spm MT8192_POWER_DOMAIN_MFG2>,
1427 <&spm MT8192_POWER_DOMAIN_MFG3>,
1428 <&spm MT8192_POWER_DOMAIN_MFG4>,
1429 <&spm MT8192_POWER_DOMAIN_MFG5>,
1430 <&spm MT8192_POWER_DOMAIN_MFG6>;
1461 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
1472 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
1482 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
[all …]
Dmt8167.dtsi42 spm: power-controller { label
139 power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
149 power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
159 power-domains = <&spm MT8167_POWER_DOMAIN_ISP>;
169 power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>;
Dmt8186.dtsi889 spm: power-controller { label
1159 power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
1537 power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
1602 power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
1703 power-domains = <&spm MT8186_POWER_DOMAIN_MFG2>,
1704 <&spm MT8186_POWER_DOMAIN_MFG3>;
1732 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1741 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1752 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1763 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
[all …]
Dmt8183.dtsi851 spm: power-controller { label
1217 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1459 <&spm MT8183_POWER_DOMAIN_AUDIO>;
1645 <&spm MT8183_POWER_DOMAIN_MFG_CORE0>,
1646 <&spm MT8183_POWER_DOMAIN_MFG_CORE1>,
1647 <&spm MT8183_POWER_DOMAIN_MFG_2D>;
1669 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1702 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1714 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1723 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
[all …]
Dmt8365.dtsi308 spm: power-controller { label
743 power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
754 power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
772 power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
790 power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>;
807 power-domains = <&spm MT8365_POWER_DOMAIN_VENC>;
/linux-6.8/Documentation/devicetree/bindings/arm/msm/
Dqcom,saw2.txt1 SPM AVS Wrapper 2 (SAW2)
3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
42 Definition: Indicates that this SPM device acts as a regulator device
43 device for the core (CPU or Cache) the SPM is attached
/linux-6.8/drivers/soc/qcom/
Dspm.c17 #include <soc/qcom/spm.h>
75 /* SPM register data for 8909 */
87 /* SPM register data for 8916 */
118 /* SPM register data for 8976 */
146 /* SPM register data for 8974, 8084 */
158 /* SPM register data for 8226 */
179 /* SPM register data for 8064 */
293 /* Write the SPM sequences first.. */ in spm_dev_probe()
301 * CPU was held in reset, the reset signal could trigger the SPM state in spm_dev_probe()
DMakefile28 obj-$(CONFIG_QCOM_SPM) += spm.o
/linux-6.8/Documentation/devicetree/bindings/media/
Dmediatek,mt8195-jpegdec.yaml105 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
128 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
143 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
158 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC2>;
Dmediatek,mt8195-jpegenc.yaml105 power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
124 power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
137 power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
Dmediatek,vcodec-subdev-decoder.yaml239 power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>;
265 power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>;
/linux-6.8/Documentation/devicetree/bindings/soc/qcom/
Dqcom,spm.yaml4 $id: http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml#
37 description: Base address and size of the SPM register region
/linux-6.8/Documentation/ABI/testing/
Dsysfs-class-firmware-attributes325 This role is specific to Secure Platform Management (SPM) attribute.
428 HP specific class extensions - Secure Platform Manager (SPM)
431 What: /sys/class/firmware-attributes/*/authentication/SPM/kek
443 What: /sys/class/firmware-attributes/*/authentication/SPM/sk
454 What: /sys/class/firmware-attributes/*/authentication/SPM/status
/linux-6.8/Documentation/devicetree/bindings/cpu/
Didle-states.yaml260 trigger to execute the SPM state machine. The SPM state machine waits for the
263 the SPM state machine out of its wait, the next step is to ensure that the
266 driver and is not defined in the DT. The SPM state machine should be
273 registers active. The SPM should be configured to execute the retention
280 cpu or the system resources. This helps save power only on that core. The SPM
298 this essentially is cpu power down. The SPM in this state also may handshake
/linux-6.8/Documentation/devicetree/bindings/phy/
Dmediatek,pcie-phy.yaml74 power-domains = <&spm 2>;
/linux-6.8/Documentation/devicetree/bindings/mfd/
Dmediatek,mt8195-scpsys.yaml51 spm: power-controller {
/linux-6.8/Documentation/devicetree/bindings/dsp/
Dmediatek,mt8186-dsp.yaml90 power-domains = <&spm 6>;
/linux-6.8/tools/testing/selftests/mm/
Dtest_hmm.sh83 echo "# Smoke testing with SPM enabled"
/linux-6.8/drivers/gpu/drm/imagination/
Dpvr_rogue_fwif_sf.h116 "UFO SPM PR-Checks for FWCtx 0x%08.8x" },
118 …"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= ????????, [0x%08.8x] is ???????? req…
232 "UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },
234 "UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires 0x%08.8x" },
1061 "SPM Owner = 3D-BG" },
1063 "SPM Owner = 3D-IRQ" },
1065 "SPM Owner = NONE" },
1067 "SPM Owner = TA-BG" },
1069 "SPM Owner = TA-IRQ" },
1101 "SPM State = none" },
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