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/linux-5.10/Documentation/devicetree/bindings/interconnect/
Dqcom,rpmh.yaml48 - qcom,sm8150-aggre1-noc
49 - qcom,sm8150-aggre2-noc
50 - qcom,sm8150-camnoc-noc
51 - qcom,sm8150-compute-noc
52 - qcom,sm8150-config-noc
53 - qcom,sm8150-dc-noc
54 - qcom,sm8150-gem-noc
55 - qcom,sm8150-ipa-virt
56 - qcom,sm8150-mc-virt
57 - qcom,sm8150-mmss-noc
[all …]
Dqcom,osm-l3.yaml22 - qcom,sm8150-osm-l3
/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dqcom,adsp.txt21 "qcom,sm8150-adsp-pas"
22 "qcom,sm8150-cdsp-pas"
23 "qcom,sm8150-mpss-pas"
24 "qcom,sm8150-slpi-pas"
48 qcom,sm8150-adsp-pas:
49 qcom,sm8150-cdsp-pas:
50 qcom,sm8150-slpi-pas:
57 qcom,sm8150-mpss-pas:
114 qcom,sm8150-adsp-pas:
115 qcom,sm8150-cdsp-pas:
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Dqcom,gcc-sm8150.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for SM8150
15 power domains on SM8150.
18 - dt-bindings/clock/qcom,gcc-sm8150.h
22 const: qcom,gcc-sm8150
65 compatible = "qcom,gcc-sm8150";
Dqcom,dispcc-sm8x50.yaml7 title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250
14 power domains on SM8150 and SM8250.
17 dt-bindings/clock/qcom,dispcc-sm8150.h
23 - qcom,sm8150-dispcc
Dqcom,videocc.yaml14 power domains on SDM845/SC7180/SM8150/SM8250.
19 dt-bindings/clock/qcom,videocc-sm8150.h
27 - qcom,sm8150-videocc
Dqcom,gpucc.yaml14 power domains on SDM845/SC7180/SM8150/SM8250.
19 dt-bindings/clock/qcom,gpucc-sm8150.h
27 - qcom,sm8150-gpucc
Dqcom,rpmhcc.yaml22 - qcom,sm8150-rpmh-clk
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsm8150.dtsi12 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
13 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
164 compatible = "qcom,scm-sm8150", "qcom,scm";
412 compatible = "qcom,gcc-sm8150";
445 compatible = "qcom,sm8150-config-noc";
452 compatible = "qcom,sm8150-system-noc";
459 compatible = "qcom,sm8150-mc-virt";
466 compatible = "qcom,sm8150-aggre1-noc";
473 compatible = "qcom,sm8150-aggre2-noc";
480 compatible = "qcom,sm8150-compute-noc";
[all …]
Dsm8150-mtp.dts11 #include "sm8150.dtsi"
17 model = "Qualcomm Technologies, Inc. SM8150 MTP";
18 compatible = "qcom,sm8150-mtp";
/linux-5.10/drivers/interconnect/qcom/
DMakefile11 qnoc-sm8150-objs := sm8150.o
23 obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
Dsm8150.c12 #include <dt-bindings/interconnect/qcom,sm8150.h>
16 #include "sm8150.h"
598 { .compatible = "qcom,sm8150-aggre1-noc",
600 { .compatible = "qcom,sm8150-aggre2-noc",
602 { .compatible = "qcom,sm8150-camnoc-virt",
604 { .compatible = "qcom,sm8150-compute-noc",
606 { .compatible = "qcom,sm8150-config-noc",
608 { .compatible = "qcom,sm8150-dc-noc",
610 { .compatible = "qcom,sm8150-gem-noc",
612 { .compatible = "qcom,sm8150-ipa-virt",
[all …]
DKconfig69 tristate "Qualcomm SM8150 interconnect driver"
75 This is a driver for the Qualcomm Network-on-Chip on sm8150-based
/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,usb-snps-femto-v2.yaml19 - qcom,sm8150-usb-hs-phy
65 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
67 compatible = "qcom,sm8150-usb-hs-phy";
Dqcom,qmp-phy.yaml32 - qcom,sm8150-qmp-ufs-phy
215 - qcom,sm8150-qmp-ufs-phy
/linux-5.10/drivers/clk/qcom/
DKconfig417 tristate "SM8150 and SM8250 Display Clock Controller"
421 SM8150 and SM8250 devices.
426 tristate "SM8150 Global Clock Controller"
428 Support for the global clock controller on SM8150 devices.
441 tristate "SM8150 Graphics Clock Controller"
444 Support for the graphics clock controller on SM8150 devices.
457 tristate "SM8150 Video Clock Controller"
461 Support for the video clock controller on SM8150 devices.
Dvideocc-sm8150.c11 #include <dt-bindings/clock/qcom,videocc-sm8150.h>
234 { .compatible = "qcom,sm8150-videocc" },
258 .name = "video_cc-sm8150",
276 MODULE_DESCRIPTION("QTI VIDEOCC SM8150 Driver");
DMakefile68 obj-$(CONFIG_SM_GCC_8150) += gcc-sm8150.o
70 obj-$(CONFIG_SM_GPUCC_8150) += gpucc-sm8150.o
72 obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
Dgpucc-sm8150.c11 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
281 { .compatible = "qcom,sm8150-gpucc" },
302 .name = "sm8150-gpucc",
319 MODULE_DESCRIPTION("QTI GPUCC SM8150 Driver");
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8150-pinctrl.txt1 Qualcomm SM8150 TLMM block
9 Definition: must be "qcom,sm8150-pinctrl"
177 compatible = "qcom,sm8150-pinctrl";
/linux-5.10/drivers/gpu/drm/msm/
DKconfig124 bool "Enable DSI 7nm PHY driver in MSM DRM (used by SM8150/SM8250)"
128 Choose this option if DSI PHY on SM8150/SM8250 is used on the
/linux-5.10/drivers/pinctrl/qcom/
DKconfig222 tristate "Qualcomm Technologies Inc SM8150 pin controller driver"
228 Technologies Inc SM8150 platform.
/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dqcom-wdt.yaml21 - qcom,apss-wdt-sm8150
/linux-5.10/drivers/remoteproc/
Dqcom_q6v5_pas.c714 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
715 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
716 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
717 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
/linux-5.10/Documentation/devicetree/bindings/firmware/
Dqcom,scm.txt24 * "qcom,scm-sm8150"

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