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/linux-5.10/drivers/net/ethernet/qualcomm/emac/
Demac-sgmii.c5 /* Qualcomm Technologies, Inc. EMAC SGMII Controller driver.
14 #include "emac-sgmii.h"
88 /* Initialize the SGMII link between the internal and external PHYs. */
121 net_err_ratelimited("%s: failed to clear SGMII irq: status:0x%x bits:0x%x\n", in emac_sgmii_irq_clear()
158 /* The SGMII is capable of recovering from some decode in emac_sgmii_interrupt()
193 * SGMII in emac_sgmii_reset_prepare()
214 struct emac_sgmii *sgmii = &adpt->phy; in emac_sgmii_common_open() local
217 if (sgmii->irq) { in emac_sgmii_common_open()
222 writel(0, sgmii->base + EMAC_SGMII_PHY_INTERRUPT_MASK); in emac_sgmii_common_open()
224 ret = request_irq(sgmii->irq, emac_sgmii_interrupt, 0, in emac_sgmii_common_open()
[all …]
DMakefile8 qcom-emac-objs := emac.o emac-mac.o emac-phy.o emac-sgmii.o emac-ethtool.o \
9 emac-sgmii-fsm9900.o emac-sgmii-qdf2432.o \
10 emac-sgmii-qdf2400.o
Demac-sgmii-qdf2432.c5 /* Qualcomm Technologies, Inc. QDF2432 EMAC SGMII Controller driver.
19 /* SGMII digital lane registers */
44 /* SGMII digital lane register values */
172 /* SGMII lane-x init */ in emac_sgmii_init_qdf2432()
189 netdev_err(adpt->netdev, "SGMII failed to start\n"); in emac_sgmii_init_qdf2432()
198 /* Mask out all the SGMII Interrupt */ in emac_sgmii_init_qdf2432()
Demac-sgmii-qdf2400.c5 /* Qualcomm Technologies, Inc. QDF2400 EMAC SGMII Controller driver.
19 /* SGMII digital lane registers */
46 /* SGMII digital lane register values */
185 /* SGMII lane-x init */ in emac_sgmii_init_qdf2400()
202 netdev_err(adpt->netdev, "SGMII failed to start\n"); in emac_sgmii_init_qdf2400()
211 /* Mask out all the SGMII Interrupt */ in emac_sgmii_init_qdf2400()
/linux-5.10/Documentation/devicetree/bindings/net/
Dsocfpga-dwmac.txt27 altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
29 This device node has additional phandle dependency, the sgmii converter:
32 - compatible : Should be altr,gmii-to-sgmii-2.0
38 compatible = "altr,gmii-to-sgmii-2.0";
55 phy-mode = "sgmii";
56 altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
Dqcom-emac.txt3 This network controller consists of two devices: a MAC and an SGMII
20 - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
61 compatible = "qcom,fsm9900-emac-sgmii";
107 compatible = "qcom,qdf2432-emac-sgmii";
Dmediatek-net.txt37 SGMII setup which is required for those SoCs equipped with SGMII such
38 as MT7622 and MT7629 SoC. And MT7622 have only one set of SGMII shared
39 by GMAC1 and GMAC2; MT7629 have two independent sets of SGMII directed
Dti,dp83869.yaml22 SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
25 SGMII and SGMII to RGMII.
/linux-5.10/arch/mips/cavium-octeon/executive/
Dcvmx-helper-sgmii.c29 * Functions for SGMII initialization, configuration,
45 * Perform initialization required only once for an SGMII port.
67 * interval. SGMII specifies a 1.6ms interval. in __cvmx_helper_sgmii_hardware_init_one_time()
78 /* SGMII */ in __cvmx_helper_sgmii_hardware_init_one_time()
89 * In SGMII PHY mode, tx_Config_Reg<D15:D0> is in __cvmx_helper_sgmii_hardware_init_one_time()
90 * PCS*_SGM*_AN_ADV_REG. In SGMII MAC mode, in __cvmx_helper_sgmii_hardware_init_one_time()
158 cvmx_dprintf("SGMII%d: Timeout waiting for port %d " in __cvmx_helper_sgmii_hardware_init_link()
167 * sgmii negotiation starts. in __cvmx_helper_sgmii_hardware_init_link()
177 * that sgmii autonegotiation is complete. In MAC mode this in __cvmx_helper_sgmii_hardware_init_link()
185 /* cvmx_dprintf("SGMII%d: Port %d link timeout\n", interface, index); */ in __cvmx_helper_sgmii_hardware_init_link()
[all …]
/linux-5.10/arch/powerpc/boot/dts/fsl/
Dp5040ds.dts179 phy-connection-type = "sgmii";
183 phy-connection-type = "sgmii";
187 phy-connection-type = "sgmii";
191 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
211 phy-connection-type = "sgmii";
215 phy-connection-type = "sgmii";
219 phy-connection-type = "sgmii";
314 hydra_sg_slot2: sgmii-mdio@28 {
337 hydra_sg_slot3: sgmii-mdio@68 {
[all …]
Dt4240rdb.dts157 phy-connection-type = "sgmii";
162 phy-connection-type = "sgmii";
167 phy-connection-type = "sgmii";
172 phy-connection-type = "sgmii";
197 phy-connection-type = "sgmii";
202 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
212 phy-connection-type = "sgmii";
Dp4080ds.dts197 phy-connection-type = "sgmii";
202 phy-connection-type = "sgmii";
207 phy-connection-type = "sgmii";
212 phy-connection-type = "sgmii";
224 phy-connection-type = "sgmii";
229 phy-connection-type = "sgmii";
234 phy-connection-type = "sgmii";
239 phy-connection-type = "sgmii";
Dt4240qds.dts481 phy-connection-type = "sgmii";
486 phy-connection-type = "sgmii";
491 phy-connection-type = "sgmii";
496 phy-connection-type = "sgmii";
506 phy-connection-type = "sgmii";
557 phy-connection-type = "sgmii";
562 phy-connection-type = "sgmii";
567 phy-connection-type = "sgmii";
572 phy-connection-type = "sgmii";
582 phy-connection-type = "sgmii";
Dt1042d4rdb.dts56 phy-connection-type = "sgmii";
61 phy-connection-type = "sgmii";
66 phy-connection-type = "sgmii";
/linux-5.10/drivers/net/dsa/sja1105/
DKconfig15 - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)
16 - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)
17 - SJA1105R (Gen. 2, SGMII, No TT-Ethernet)
18 - SJA1105S (Gen. 2, SGMII, TT-Ethernet)
/linux-5.10/arch/mips/boot/dts/cavium-octeon/
Docteon_68xx.dts74 cavium,qlm-trim = "4,sgmii";
83 cavium,qlm-trim = "4,sgmii";
92 cavium,qlm-trim = "4,sgmii";
101 cavium,qlm-trim = "4,sgmii";
118 cavium,qlm-trim = "0,sgmii";
127 cavium,qlm-trim = "0,sgmii";
136 cavium,qlm-trim = "0,sgmii";
145 cavium,qlm-trim = "0,sgmii";
162 cavium,qlm-trim = "2,sgmii";
171 cavium,qlm-trim = "2,sgmii";
[all …]
/linux-5.10/arch/mips/boot/dts/mscc/
Docelot_pcb120.dts89 phy-mode = "sgmii";
95 phy-mode = "sgmii";
101 phy-mode = "sgmii";
107 phy-mode = "sgmii";
/linux-5.10/drivers/net/ethernet/freescale/fman/
Dfman_memac.c51 /* SGMII Control defines */
59 /* SGMII Device Ability for SGMII defines */
69 /* SGMII IF Mode defines */
518 /* SGMII mode */ in setup_sgmii_internal_phy()
541 /* Device ability according to SGMII specification */ in setup_sgmii_internal_phy()
545 /* Adjust link timer for SGMII - in setup_sgmii_internal_phy()
546 * According to Cisco SGMII specification the timer should be 1.6 ms. in setup_sgmii_internal_phy()
548 * - When running as 1G SGMII, Serdes clock is 125 MHz, so in setup_sgmii_internal_phy()
551 * - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so in setup_sgmii_internal_phy()
554 * Since link_timer value of 1G SGMII will be too short for 2.5 SGMII, in setup_sgmii_internal_phy()
[all …]
/linux-5.10/arch/mips/include/asm/octeon/
Dcvmx-helper-sgmii.h31 * Functions for SGMII initialization, configuration,
39 * Probe a SGMII interface and determine the number of ports
40 * connected to it. The SGMII interface should still be down after
51 * Bringup and enable a SGMII interface. After this call packet
/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_pcs.h16 /* PCS registers (AN/TBI/SGMII/RGMII) offsets */
30 #define GMAC_AN_CTRL_SGMRAL BIT(18) /* SGMII RAL Control */
48 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
99 * @srgmi_ral: to manage MAC-2-MAC SGMII connections.
103 * configure SGMII RAL.
/linux-5.10/drivers/net/ethernet/mediatek/
Dmtk_sgmii.c4 /* A library for MediaTek SGMII circuit
76 /* Disable SGMII AN */ in mtk_sgmii_setup_mode_force()
81 /* SGMII force mode setting */ in mtk_sgmii_setup_mode_force()
113 struct mtk_sgmii *ss = eth->sgmii; in mtk_sgmii_restart_an()
/linux-5.10/Documentation/networking/
Dsfp-phylink.rst37 In-band mode is used with 802.3z, SGMII and similar interface modes,
47 phy-mode = "sgmii";
50 does not use in-band SGMII signalling. The PHY is expected to follow
60 phy-mode = "sgmii";
64 to the MAC through the SGMII control word, and the MAC is expected to
211 methods such as 1000base-X and SGMII.
/linux-5.10/include/uapi/linux/
Dmii.h134 /* MAC and PHY tx_config_Reg[15:0] for SGMII in-band auto-negotiation.*/
135 #define ADVERTISE_SGMII 0x0001 /* MAC can do SGMII */
136 #define LPA_SGMII 0x0001 /* PHY can do SGMII */
137 #define LPA_SGMII_SPD_MASK 0x0c00 /* SGMII speed mask */
138 #define LPA_SGMII_FULL_DUPLEX 0x1000 /* SGMII full duplex */
139 #define LPA_SGMII_DPX_SPD_MASK 0x1C00 /* SGMII duplex and speed bits */
/linux-5.10/arch/arm/boot/dts/
Darmada-xp-openblocks-ax3-4.dts115 phy-mode = "sgmii";
122 phy-mode = "sgmii";
129 phy-mode = "sgmii";
136 phy-mode = "sgmii";
/linux-5.10/drivers/net/pcs/
Dpcs-lynx.c13 #define SGMII_AN_LINK_TIMER_NS 1600000 /* defined by SGMII spec */
125 /* Adjust link timer for SGMII */ in lynx_pcs_config_sgmii()
232 * The hardware reference manual wants to call this mode SGMII, but it isn't
233 * really, since the fundamental features of SGMII:
239 * Since there is no difference between fixed speed SGMII w/o AN and 802.3z w/o

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