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/linux/Documentation/devicetree/bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
7 title: Microchip Sparx5 Serdes controller
14 The Sparx5 SERDES interfaces share the same basic functionality, but
17 The following list lists the SERDES features:
32 The SERDES6G is a high-speed SERDES interface, which can operate at
42 The SERDES10G is a high-speed SERDES interface, which can operate at
55 The SERDES25G is a high-speed SERDES interface, which can operate at
71 pattern: "^serdes@[0-9a-f]+$"
76 - microchip,sparx5-serdes
77 - microchip,lan9691-serdes
[all...]
H A Dti,phy-am654-serdes.yaml4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#
7 title: TI AM654 SERDES
10 This binding describes the TI AM654 SERDES. AM654 SERDES can be configured
19 - ti,phy-am654-serdes
26 - const: serdes
41 include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes lane function.
43 ti,serdes-clk:
44 description: Phandle to the SYSCON entry required for configuring SERDES clock selection.
52 description: Phandle to the SYSCON entry required for configuring SERDES lan
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H A Dmscc,vsc7514-serdes.yaml4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
7 title: Microsemi Ocelot SerDes muxing
15 space for setting up the SerDes to switch port muxing.
17 A SerDes X can be "muxed" to work with switch port Y or Z for example.
18 One specific SerDes can also be used as a PCIe interface.
20 Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
22 There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
35 - mscc,vsc7514-serdes
40 The first number defines the input port to use for a given SerDes macro.
42 dt-bindings/phy/phy-ocelot-serdes
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H A Dmicrochip,lan966x-serdes.yaml4 $id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
7 title: Microchip Lan966x Serdes controller
16 interfaces. The Serdes controller will allow to configure these interfaces
23 interface SerDes 2.
27 pattern: "^serdes@[0-9a-f]+$"
30 const: microchip,lan966x-serdes
42 dt-bindings/phy/phy-lan966x-serdes.
53 serdes: serdes@e2004010 {
54 compatible = "microchip,lan966x-serdes";
[all...]
H A Drenesas,r8a779f0-ether-serdes.yaml4 $id: http://devicetree.org/schemas/phy/renesas,r8a779f0-ether-serdes.yaml#
7 title: Renesas Ethernet SERDES
14 const: renesas,r8a779f0-ether-serdes
29 description: Port number of SERDES.
48 compatible = "renesas,r8a779f0-ether-serdes";
/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5_pcb135_board.dtsi367 phys = <&serdes 13>;
374 phys = <&serdes 13>;
381 phys = <&serdes 13>;
388 phys = <&serdes 13>;
395 phys = <&serdes 14>;
402 phys = <&serdes 14>;
409 phys = <&serdes 14>;
416 phys = <&serdes 14>;
423 phys = <&serdes 15>;
430 phys = <&serdes 1
[all...]
H A Dsparx5_pcb134_board.dtsi726 phys = <&serdes 13>;
736 phys = <&serdes 14>;
745 phys = <&serdes 15>;
754 phys = <&serdes 16>;
763 phys = <&serdes 17>;
772 phys = <&serdes 18>;
781 phys = <&serdes 19>;
790 phys = <&serdes 20>;
799 phys = <&serdes 21>;
808 phys = <&serdes 2
[all...]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi12 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
13 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */
14 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */
20 amd,serdes-blwc = <1>, <1>, <0>;
21 amd,serdes-cdr-rate = <2>, <2>, <7>;
22 amd,serdes-pq-skew = <10>, <10>, <18>;
23 amd,serdes-tx-amp = <0>, <0>, <0>;
24 amd,serdes-dfe-tap-config = <3>, <3>, <3>;
25 amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
38 <0 0xe1240c00 0 0x00400>, /* SERDES R
[all...]
/linux/Documentation/devicetree/bindings/net/
H A Damd-xgbe.txt8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
43 - amd,serdes-blwc: Baseline wandering correction enablement
46 - amd,serdes-cdr-rate: CDR rate speed selection
47 - amd,serdes-pq-skew: PQ (data sampling) skew
48 - amd,serdes-tx-amp: TX amplitude boost
49 - amd,serdes-dfe-tap-config: DFE taps available to run
50 - amd,serdes-dfe-tap-enable: DFE taps to enable
70 amd,serdes
[all...]
H A Dhisilicon-hns-dsaf.txt17 The second region is SerDes base register and size(optional, only used when
18 serdes-syscon in port node does not exist). It is recommended using
19 serdes-syscon rather than this address.
40 - serdes-syscon: is syscon handle for SerDes register.
81 serdes-syscon = <&serdes>;
87 serdes-syscon = <&serdes>;
H A Dmicrochip,sparx5-switch.yaml115 phandle of a Ethernet SerDes PHY. This defines which SerDes
193 phys = <&serdes 13>;
202 phys = <&serdes 29>;
211 phys = <&serdes 30>;
220 phys = <&serdes 31>;
229 phys = <&serdes 32>;
239 phys = <&serdes 0>;
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-pcie-msm8996.c144 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
173 * @serdes: iomapped memory space for phy's serdes (i.e. PLL)
185 void __iomem *serdes; member
284 void __iomem *serdes = qphy->serdes; in qmp_pcie_msm8996_serdes_init() local
291 qmp_configure(qmp->dev, serdes, serdes_tbl, serdes_tbl_num); in qmp_pcie_msm8996_serdes_init()
293 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET); in qmp_pcie_msm8996_serdes_init()
294 qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL], in qmp_pcie_msm8996_serdes_init()
297 status = serdes in qmp_pcie_msm8996_serdes_init()
313 void __iomem *serdes = qphy->serdes; qmp_pcie_msm8996_com_init() local
366 void __iomem *serdes = qphy->serdes; qmp_pcie_msm8996_com_exit() local
654 qmp_pcie_msm8996_create(struct device * dev,struct device_node * np,int id,void __iomem * serdes,const struct qmp_phy_cfg * cfg) qmp_pcie_msm8996_create() argument
729 void __iomem *serdes; qmp_pcie_msm8996_probe() local
[all...]
H A Dphy-qcom-qmp-ufs.c1072 u16 serdes; member
1081 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
1082 const struct qmp_phy_init_tbl *serdes; member
1102 /* Main init sequence for PHY blocks - serdes, tx, rx, pcs */
1125 void __iomem *serdes; member
1173 .serdes = 0,
1182 .serdes = 0,
1197 .serdes = msm8996_ufsphy_serdes,
1220 .serdes = sm8350_ufsphy_serdes,
1230 .serdes
1686 void __iomem *serdes = qmp->serdes; qmp_ufs_serdes_init() local
[all...]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dpcs-639x.c3 * Marvell 88E6352 family SERDES PCS support
18 #include "serdes.h"
79 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
219 * After chip reset, SERDES reconfiguration or SERDES core in mv88e6390_erratum_3_14()
220 * Software Reset, the SERDES lanes may not be properly aligned in mv88e6390_erratum_3_14()
271 "can't read Serdes PHY %s: %pe\n", in mv88e639x_sgmii_pcs_get_state()
280 "can't read Serdes PHY %s: %pe\n", in mv88e639x_sgmii_pcs_get_state()
289 "can't read Serdes PHY %s: %pe\n", in mv88e639x_sgmii_pcs_get_state()
366 "can't access Serdes PH in mv88e639x_sgmii_pcs_link_up()
[all...]
/linux/drivers/net/ethernet/sfc/
H A Denum.h17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
21 * @LOOPBACK_XFI: loopback within BPX before XFI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
25 * @LOOPBACK_XFI_FAR: loopback after XFI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
36 * @LOOPBACK_XFI_WS: wireside loopback excluding XFI serdes
37 * @LOOPBACK_XFI_WS_FAR: wireside loopback including XFI serdes
/linux/drivers/net/ethernet/sfc/falcon/
H A Denum.h17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
21 * @LOOPBACK_XFI: loopback within BPX before XFI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
25 * @LOOPBACK_XFI_FAR: loopback after XFI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
36 * @LOOPBACK_XFI_WS: wireside loopback excluding XFI serdes
37 * @LOOPBACK_XFI_WS_FAR: wireside loopback including XFI serdes
/linux/drivers/net/ethernet/sfc/siena/
H A Denum.h17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
21 * @LOOPBACK_XFI: loopback within BPX before XFI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
25 * @LOOPBACK_XFI_FAR: loopback after XFI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
36 * @LOOPBACK_XFI_WS: wireside loopback excluding XFI serdes
37 * @LOOPBACK_XFI_WS_FAR: wireside loopback including XFI serdes
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
155 phys = <&serdes 0 CU(0)>;
162 phys = <&serdes 1 CU(1)>;
169 phys = <&serdes 4 SERDES6G(2)>;
176 phys = <&serdes 5 SERDES6G(2)>;
183 phys = <&serdes 6 SERDES6G(2)>;
190 phys = <&serdes 7 SERDES6G(2)>;
196 &serdes {
H A Dlan966x-pcb8309.dts7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
181 phys = <&serdes 0 CU(0)>;
188 phys = <&serdes 1 CU(1)>;
196 phys = <&serdes 2 SERDES6G(0)>;
204 phys = <&serdes 3 SERDES6G(1)>;
208 &serdes {
/linux/drivers/phy/microchip/
H A DKconfig7 tristate "Microchip Sparx5 SerDes PHY driver"
13 Enable this for support of the 10G/25G SerDes on Microchip Sparx5.
16 tristate "SerDes PHY driver for Microchip LAN966X"
22 Enable this for supporting SerDes muxing with Microchip LAN966X
/linux/drivers/phy/marvell/
H A DKconfig36 shared serdes PHYs on Marvell Armada 3700. Its serdes lanes can be
55 shared serdes PHYs on Marvell Armada 38x. Its serdes lanes can be
66 shared serdes PHYs on Marvell Armada 7k/8k (in the CP110). Its serdes
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,am654-serdes-ctrl.yaml4 $id: http://devicetree.org/schemas/soc/ti/ti,am654-serdes-ctrl.yaml#
7 title: Texas Instruments AM654 Serdes Control Syscon
15 - const: ti,am654-serdes-ctrl
35 compatible = "ti,am654-serdes-ctrl", "syscon", "simple-mfd";
/linux/drivers/phy/ti/
H A DKconfig25 tristate "TI AM654 SERDES support"
33 This option enables support for TI AM654 SerDes PHY used for
37 tristate "TI J721E WIZ (SERDES Wrapper) support"
47 SoC. WIZ is a serdes wrapper used to configure some of the input
48 signals to the SERDES (Sierra/Torrent). This driver configures
/linux/arch/mips/boot/dts/mscc/
H A Docelot_pcb120.dts8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
99 phys = <&serdes 4 SERDES1G(2)>;
106 phys = <&serdes 5 SERDES1G(5)>;
113 phys = <&serdes 6 SERDES1G(3)>;
120 phys = <&serdes 9 SERDES1G(4)>;
/linux/drivers/misc/
H A Dlan966x_pci.dtso10 #include <dt-bindings/phy/phy-lan966x-serdes.h>
110 serdes: serdes@e202c000 {
111 compatible = "microchip,lan966x-serdes";
162 phys = <&serdes 0 CU(0)>;
170 phys = <&serdes 1 CU(1)>;

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