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/linux-3.3/net/netfilter/ipvs/
Dip_vs_proto_tcp.c388 #define sCL IP_VS_TCP_S_CLOSE macro
407 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */
409 /*fin*/ {{sCL, sCW, sSS, sTW, sTW, sTW, sCL, sCW, sLA, sLI, sTW }},
410 /*ack*/ {{sCL, sES, sSS, sES, sFW, sTW, sCL, sCW, sCL, sLI, sES }},
411 /*rst*/ {{sCL, sCL, sCL, sSR, sCL, sCL, sCL, sCL, sLA, sLI, sSR }},
414 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */
416 /*fin*/ {{sTW, sFW, sSS, sTW, sFW, sTW, sCL, sTW, sLA, sLI, sTW }},
417 /*ack*/ {{sES, sES, sSS, sES, sFW, sTW, sCL, sCW, sLA, sES, sES }},
418 /*rst*/ {{sCL, sCL, sSS, sCL, sCL, sTW, sCL, sCL, sCL, sCL, sCL }},
421 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */
[all …]
/linux-3.3/net/netfilter/
Dnf_conntrack_proto_sctp.c60 #define sCL SCTP_CONNTRACK_CLOSED macro
104 /* sNO, sCL, sCW, sCE, sES, sSS, sSR, sSA */
106 /* init_ack */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA},
107 /* abort */ {sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL},
108 /* shutdown */ {sCL, sCL, sCW, sCE, sSS, sSS, sSR, sSA},
109 /* shutdown_ack */ {sSA, sCL, sCW, sCE, sES, sSA, sSA, sSA},
110 /* error */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA},/* Can't have Stale cookie*/
111 /* cookie_echo */ {sCL, sCL, sCE, sCE, sES, sSS, sSR, sSA},/* 5.2.4 - Big TODO */
112 /* cookie_ack */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA},/* Can't come in orig dir */
113 /* shutdown_comp*/ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sCL}
[all …]
Dnf_conntrack_proto_tcp.c93 #define sCL TCP_CONNTRACK_CLOSE macro
144 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */
159 * sCL -> sSS
161 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */
176 * sCL -> sIG
178 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */
179 /*fin*/ { sIV, sIV, sFW, sFW, sLA, sLA, sLA, sTW, sCL, sIV },
193 * sCL -> sCL
195 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */
196 /*ack*/ { sES, sIV, sES, sES, sCW, sCW, sTW, sTW, sCL, sIV },
[all …]
/linux-3.3/drivers/i2c/busses/
Dscx200_i2c.c40 static int scl = CONFIG_SCx200_I2C_SCL; variable
43 module_param(scl, int, 0);
44 MODULE_PARM_DESC(scl, "GPIO line for SCL");
50 scx200_gpio_set(scl, state); in scx200_i2c_setscl()
60 return scx200_gpio_get(scl); in scx200_i2c_getscl()
98 pr_debug(NAME ": SCL=GPIO%02u, SDA=GPIO%02u\n", scl, sda); in scx200_i2c_init()
100 if (scl == -1 || sda == -1 || scl == sda) { in scx200_i2c_init()
101 printk(KERN_ERR NAME ": scl and sda must be specified\n"); in scx200_i2c_init()
106 scx200_gpio_configure(scl, ~2, 5); in scx200_i2c_init()
Di2c-acorn.c25 #define SCL 0x02 macro
30 * Note also that we need to preserve the value of SCL and
38 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
42 ones |= SCL; in ioc_setscl()
44 ones &= ~SCL; in ioc_setscl()
53 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
68 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
92 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
Di2c-versatile.c23 #define SCL (1 << 0) macro
43 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
55 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
96 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
Di2c-omap.c145 /* I2C SCL time value when Master */
155 #define OMAP_I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense in */
156 #define OMAP_I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive out */
420 unsigned long scl; in omap_i2c_init() local
423 scl = internal_clk / 400; in omap_i2c_init()
424 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
425 fssclh = (scl / 3) - 5; in omap_i2c_init()
428 scl = fclk_rate / dev->speed; in omap_i2c_init()
429 hsscll = scl - (scl / 3) - 7; in omap_i2c_init()
430 hssclh = (scl / 3) - 5; in omap_i2c_init()
[all …]
Di2c-sh7760.c45 #define MCR_FSCL 0x40 /* override SCL pin */
170 /* manual says: wait >= 0.5 SCL times */ in sh7760_i2c_irq()
175 /* keep the RDF bit: ctrl holds SCL low in sh7760_i2c_irq()
201 /* keep the TEND bit: ctl holds SCL low in sh7760_i2c_irq()
387 /* calculate CCR register setting for a desired scl clock. SCL clock is
391 * scl = iclk/(SCGD*8 + 20).
425 /* fail if more than 25% off of requested SCL */ in calc_CCR()
500 dev_err(&pdev->dev, "invalid SCL clock: %dkHz\n", in sh7760_i2c_probe()
Di2c-gpio.c43 /* Toggle SCL by changing the direction of the pin. */
55 * Toggle SCL by changing the output value of the pin. This is used
103 ret = gpio_request(pdata->scl_pin, "scl"); in i2c_gpio_probe()
159 dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n", in i2c_gpio_probe()
/linux-3.3/drivers/i2c/algos/
Di2c-algo-bit.c86 * Raise scl line, and do checking for delays. This is necessary for slower
95 /* Not all adapters have scl sense line... */ in sclhi()
118 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go " in sclhi()
131 /* assert: scl, sda are high */ in i2c_start()
139 /* assert: scl is low */ in i2c_repstart()
150 /* assert: scl is low */ in i2c_stop()
164 * -ETIMEDOUT if an error occurred (while raising the scl line)
173 /* assert: scl is low */ in i2c_outb()
207 /* assert: scl is low (sda undef) */ in i2c_outb()
219 /* assert: scl is low */ in i2c_inb()
[all …]
/linux-3.3/include/linux/
Di2c-gpio.h16 * @scl_pin: GPIO pin ID to use for SCL
17 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
19 * SCL low for longer than this, the transfer will time out.
24 * @scl_is_open_drain: SCL is set up as open drain. Same requirements
26 * @scl_is_output_only: SCL output drivers cannot be turned off.
Di2c-algo-pca.h35 #define I2C_PCA_ISCLL 0x02 /* SCL LOW period */
36 #define I2C_PCA_ISCLH 0x03 /* SCL HIGH period */
/linux-3.3/drivers/rtc/
Drtc-rs5c313.c72 #define SCL SCSPTR1_SPB0DT macro
93 /* And Initialize SCL for RS5C313 clock */ in rs5c313_init_port()
94 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
96 scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */ in rs5c313_init_port()
115 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
118 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
135 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
138 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
/linux-3.3/drivers/media/video/ivtv/
Divtv-i2c.c32 when putting out bits on the scl/sda lines. The general strategy taken
35 which poll the SCL line 5 times (ivtv_scldelay). I would guess that
47 The i2c bus is a 2 wire serial bus, with clock (SCL) and data (SDA)
405 IVTV_DEBUG_HI_I2C("SCL was high starting an ack\n"); in ivtv_ack()
408 IVTV_DEBUG_I2C("Could not set SCL low starting an ack\n"); in ivtv_ack()
421 IVTV_DEBUG_I2C("Failed to set SCL low after ACK\n"); in ivtv_ack()
436 IVTV_DEBUG_I2C("Error setting SCL low\n"); in ivtv_sendbyte()
453 IVTV_DEBUG_I2C("Error setting SCL low\n"); in ivtv_sendbyte()
474 IVTV_DEBUG_I2C("Error setting SCL high\n"); in ivtv_readbyte()
509 IVTV_DEBUG_I2C("SCL stuck low at start\n"); in ivtv_start()
[all …]
/linux-3.3/drivers/media/video/gspca/
Dw996Xcf.c180 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */ in w9968cf_smbus_start()
181 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */ in w9968cf_smbus_start()
186 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */ in w9968cf_smbus_stop()
187 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */ in w9968cf_smbus_stop()
188 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */ in w9968cf_smbus_stop()
199 /* SDE=1, SDA=sda, SCL=0 */ in w9968cf_smbus_write_byte()
201 /* SDE=1, SDA=sda, SCL=1 */ in w9968cf_smbus_write_byte()
203 /* SDE=1, SDA=sda, SCL=0 */ in w9968cf_smbus_write_byte()
217 /* SDE=1, SDA=1, SCL=1 */ in w9968cf_smbus_read_byte()
220 /* SDE=1, SDA=1, SCL=0 */ in w9968cf_smbus_read_byte()
[all …]
/linux-3.3/drivers/infiniband/hw/qib/
Dqib_twsi.c78 * QSFP modules are allowed to hold SCL low for 500uSec. Allow twice that
96 /* SCL is meant to be bare-drain, so never set "OUT", just DIR */ in scl_out()
113 qib_dev_err(dd, "SCL interface stuck low > %d uSec\n", in scl_out()
155 /* AT ENTRY SCL = LOW */ in i2c_ackrcv()
267 /* Both SCL and SDA should be high. If not, there in qib_twsi_reset()
284 * if SCL drops between them, another vendor's part will in qib_twsi_reset()
287 * So our START and STOP take place with SCL held high. in qib_twsi_reset()
310 /* At this point, SCL is high, SDA low. Raise SDA for STOP */ in qib_twsi_reset()
331 ret = wr_byte(dd, data); /* Leaves SCL low (from i2c_ackrcv()) */ in qib_twsi_wr()
/linux-3.3/sound/i2c/
Di2c.c211 snd_i2c_bit_direction(bus, 1, 1); /* SCL - wr, SDA - wr */ in snd_i2c_bit_start()
238 snd_i2c_bit_direction(bus, 1, 0); /* SCL - wr, SDA - rd */ in snd_i2c_bit_ack()
240 snd_i2c_bit_direction(bus, 1, 1); /* SCL - wr, SDA - wr */ in snd_i2c_bit_ack()
263 snd_i2c_bit_direction(bus, 1, 0); /* SCL - wr, SDA - rd */ in snd_i2c_bit_readbyte()
270 snd_i2c_bit_direction(bus, 1, 1); /* SCL - wr, SDA - wr */ in snd_i2c_bit_readbyte()
/linux-3.3/Documentation/devicetree/bindings/i2c/
Dsamsung-i2c.txt13 - gpios: The order of the gpios should be the following: <SDA, SCL>.
31 &gpd1 3 0 /* SCL */>;
/linux-3.3/Documentation/i2c/muxes/
Dgpio-i2cmux14 | | SCL/SDA | |-------------- | |
23 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
/linux-3.3/drivers/media/video/cx88/
Dcx88-vp3054-i2c.c5 GPIO[0] -> SCL, GPIO[1] -> SDA
47 vp3054_i2c->state |= 0x0001; /* SCL high */ in vp3054_bit_setscl()
50 vp3054_i2c->state &= ~0x0001; /* SCL low */ in vp3054_bit_setscl()
/linux-3.3/drivers/media/video/cx231xx/
Dcx231xx-avcore.c2785 /* set SCL to output 1 ; set SDA to output 1 */ in cx231xx_gpio_i2c_start()
2795 /* set SCL to output 1; set SDA to output 0 */ in cx231xx_gpio_i2c_start()
2803 /* set SCL to output 0; set SDA to output 0 */ in cx231xx_gpio_i2c_start()
2818 /* set SCL to output 0; set SDA to output 0 */ in cx231xx_gpio_i2c_end()
2829 /* set SCL to output 1; set SDA to output 0 */ in cx231xx_gpio_i2c_end()
2837 /* set SCL to input ,release SCL cable control in cx231xx_gpio_i2c_end()
2855 /* set SCL to output ; set SDA to output */ in cx231xx_gpio_i2c_write_byte()
2861 /* set SCL to output 0; set SDA to output 0 */ in cx231xx_gpio_i2c_write_byte()
2867 /* set SCL to output 1; set SDA to output 0 */ in cx231xx_gpio_i2c_write_byte()
2872 /* set SCL to output 0; set SDA to output 0 */ in cx231xx_gpio_i2c_write_byte()
[all …]
/linux-3.3/arch/cris/arch-v10/drivers/
Dds1302.c41 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
86 /* The chip latches incoming bits on the rising edge of SCL. */ in out_byte()
103 /* Read byte. Bits come LSB first, on the falling edge of SCL. in in_byte()
420 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n", in ds1302_probe()
Di2c.c130 * SCL=1 SDA=1 in i2c_start()
138 * SCL=1 SDA=0 in i2c_start()
143 * SCL=0 SDA=0 in i2c_start()
157 * SCL=0 SDA=0 in i2c_stop()
163 * SCL=1 SDA=0 in i2c_stop()
168 * SCL=1 SDA=1 in i2c_stop()
/linux-3.3/drivers/staging/panel/
DKconfig160 (SDA/SCL), while parallel ones use 2 or 3 wires for the control signals
211 int "Parallel port pin number & polarity connected to the LCD SCL signal (-17...17) "
216 LCD 'SCL' signal has been connected. It can be :
222 Default for the 'SCL' pin in custom profile is '1' (STROBE).
/linux-3.3/Documentation/i2c/busses/
Di2c-parport52 SCL ----------x--------o |-----------x------------------- pin 2
88 - Obviously you cannot read SCL (so it's not really standard-compliant).
103 SCL ----------x--------x--| o---x------------------------ pin 15

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