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/linux-6.8/tools/testing/selftests/powerpc/switch_endian/
DMakefile6 EXTRA_CLEAN = $(OUTPUT)/*.o $(OUTPUT)/check-reversed.S
12 $(OUTPUT)/switch_endian_test: $(OUTPUT)/check-reversed.S
14 $(OUTPUT)/check-reversed.o: $(OUTPUT)/check.o
17 $(OUTPUT)/check-reversed.S: $(OUTPUT)/check-reversed.o
D.gitignore3 check-reversed.S
Dswitch_endian_test.S74 #include "check-reversed.S"
/linux-6.8/sound/soc/sunxi/
Dsun50i-codec-analog.c140 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
164 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
402 { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
409 { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
416 { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
423 { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
Dsun8i-codec-analog.c121 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
145 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
161 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
185 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
292 { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
297 { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
302 { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
307 { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
/linux-6.8/tools/testing/selftests/bpf/progs/
Dtest_core_reloc_flavors.c22 /* local flavor with reversed layout */
56 /* read b using reversed layout */ in test_core_flavors()
/linux-6.8/include/linux/
Dcrc32.h72 * is used. The output of crc32_le is bit reversed [most significant bit
73 * is in bit nr 0], thus it must be reversed before use. Except for
/linux-6.8/include/linux/bcma/
Dbcma_regs.h24 #define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
25 #define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
/linux-6.8/drivers/dma/ppc4xx/
Dadma.h139 * @reverse_flags: 1 if a corresponding rxor address uses reversed address order
175 #define PPC440SPE_DESC_RXOR_REV 12 /* CDB has srcs in reversed order */
/linux-6.8/tools/perf/pmu-events/arch/x86/ivytown/
Duncore-cache.json201 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
210 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
219 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
228 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
237 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
246 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
255 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
264 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
273 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
282 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
[all …]
/linux-6.8/tools/testing/selftests/rseq/
Drseq-arm.h31 * byte order reversed to generate the trap instruction:
48 * signature should not be reversed. However, the choice between BE32
/linux-6.8/Documentation/devicetree/bindings/sound/
Dwm8741.txt19 2 = stereo reversed
Dnvidia,tegra210-adx.yaml14 RAM in the AMX except that the data flow direction is reversed.
/linux-6.8/include/uapi/linux/
Dmdio.h270 #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */
271 #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */
272 #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */
273 #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */
325 #define MDIO_PMA_10T1L_STAT_POLARITY 0x0004 /* Receive polarity is reversed */
/linux-6.8/drivers/gpio/
Dgpio-realtek-otto.c89 * Port order is reversed, meaning DCBA register layout for 1-bit
134 * Reversed port order register access
137 * register in reversed order. The two interrupt mask registers store two bits
/linux-6.8/arch/powerpc/crypto/
Daes-spe-modes.S31 lwbrx reg,0,rSP; /* load reversed */ \
34 stwbrx reg,0,rDP; /* save reversed */ \
38 lwbrx reg,0,rIP; /* load reversed */ \
41 stwbrx reg,0,rIP; /* load reversed */ \
Daes-spe-regs.h34 #define rG0 r28 /* endian reversed tweak (XTS mode) */
/linux-6.8/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-interconnect.json1531 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1540 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1549 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1558 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1567 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1576 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1585 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1594 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1603 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1612 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
[all …]
/linux-6.8/drivers/media/rc/
Dene_ir.h82 #define ENE_CIRCFG_REV_POL 0x04 /* Input polarity reversed */
87 #define ENE_CIRCFG_TX_POL_REV 0x40 /* TX polarity reversed */
/linux-6.8/Documentation/ABI/testing/
Dsysfs-bus-iio-adc-ad71927 the polarity of the excitation voltage is reversed on
/linux-6.8/tools/testing/selftests/powerpc/pmu/ebb/
Debb_on_child_test.c57 /* NB order of pipes looks reversed */ in ebb_on_child()
Dtask_event_vs_ebb_test.c50 /* NB order of pipes looks reversed */ in task_event_vs_ebb()
Dcpu_event_vs_ebb_test.c54 /* NB order of pipes looks reversed */ in cpu_event_vs_ebb()
Debb_vs_cpu_event_test.c54 /* NB order of pipes looks reversed */ in ebb_vs_cpu_event()
Debb_on_willing_child_test.c62 /* NB order of pipes looks reversed */ in ebb_on_willing_child()

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