| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_dcn4.c | 254 …ay_cfg *svp_expanded_display_cfg, struct dml2_display_cfg_programming *programming, struct dml2_co… in pack_mode_programming_params_with_implicit_subvp() argument
266 …memcpy(&programming->display_config, &display_cfg->display_config, sizeof(struct dml2_display_cfg)… in pack_mode_programming_params_with_implicit_subvp()
269 …arb_params(&display_cfg->display_config, &core->clean_me_up.mode_lib, &programming->global_regs.ar… in pack_mode_programming_params_with_implicit_subvp()
272 …watermarks(&display_cfg->display_config, &core->clean_me_up.mode_lib, &programming->global_regs.wm… in pack_mode_programming_params_with_implicit_subvp()
276 programming->fams2_required = display_cfg->stage3.fams2_required; in pack_mode_programming_params_with_implicit_subvp()
278 …et_global_fams2_programming(&core->clean_me_up.mode_lib, display_cfg, &programming->fams2_global_c… in pack_mode_programming_params_with_implicit_subvp()
282 for (stream_index = 0; stream_index < programming->display_config.num_streams; stream_index++) { in pack_mode_programming_params_with_implicit_subvp()
287 …programming->stream_programming[stream_index].stream_descriptor = &programming->display_config.str… in pack_mode_programming_params_with_implicit_subvp()
290 …programming->stream_programming[stream_index].num_odms_required = display_cfg->mode_support_result… in pack_mode_programming_params_with_implicit_subvp()
295 programming->stream_programming[stream_index].phantom_stream.enabled = true; in pack_mode_programming_params_with_implicit_subvp()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| D | dml2_dpmm_dcn4.c | 85 …in_out->programming->min_clocks.dcn4x.active.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_latenc… in calculate_system_active_minimums()
86 …in_out->programming->min_clocks.dcn4x.active.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_latenc… in calculate_system_active_minimums()
87 …in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_… in calculate_system_active_minimums()
126 …in_out->programming->min_clocks.dcn4x.svp_prefetch.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_… in calculate_svp_prefetch_minimums()
127 …in_out->programming->min_clocks.dcn4x.svp_prefetch.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_… in calculate_svp_prefetch_minimums()
128 …in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_d… in calculate_svp_prefetch_minimums()
157 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz = dml_round_up(min_uclk_bw… in calculate_svp_prefetch_minimums()
158 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz = dml_round_up(min_fclk_bw… in calculate_svp_prefetch_minimums()
159 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz = dml_round_up(min_dcfcl… in calculate_svp_prefetch_minimums()
181 …in_out->programming->min_clocks.dcn4x.idle.uclk_khz = dml_round_up(min_uclk_avg > min_uclk_latency… in calculate_idle_minimums()
[all …]
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| /linux-6.15/Documentation/ABI/testing/ |
| D | sysfs-class-fpga-manager | 13 wrong during FPGA programming (something that the driver can't
30 * write init = preparing FPGA for programming
31 * write init error = Error while preparing FPGA for programming
33 * write error = Error while programming
34 * write complete = Doing post programming steps
35 * write complete error = Error while doing post programming
43 If FPGA programming operation fails, it could be caused by crc
46 programming errors to userspace. This is a list of strings for
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_wrapper.c | 31 …(*dml_ctx)->v21.mode_programming.programming = vzalloc(sizeof(struct dml2_display_cfg_programming)… in dml21_allocate_memory()
32 if (!((*dml_ctx)->v21.mode_programming.programming)) in dml21_allocate_memory()
120 vfree(dml2->v21.mode_programming.programming); in dml21_destroy()
137 …memcpy(&context->bw_ctx.bw.dcn.arb_regs, &in_ctx->v21.mode_programming.programming->global_regs.ar… in dml21_calculate_rq_and_dlg_params()
140 …context->bw_ctx.bw.dcn.compbuf_size_kb = (int)in_ctx->v21.mode_programming.programming->global_reg… in dml21_calculate_rq_and_dlg_params()
147 dml_phantom_prog_idx = in_ctx->v21.mode_programming.programming->display_config.num_planes; in dml21_calculate_rq_and_dlg_params()
150 pln_prog = &in_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_calculate_rq_and_dlg_params()
155 …stream_prog = &in_ctx->v21.mode_programming.programming->stream_programming[pln_prog->plane_descri… in dml21_calculate_rq_and_dlg_params()
281 …_mode_programming_locals.mode_programming_params.programming = dml_ctx->v21.mode_programming.progr… in dml21_check_mode_support()
323 dml_phantom_prog_idx = dml_ctx->v21.mode_programming.programming->display_config.num_planes; in dml21_prepare_mcache_programming()
[all …]
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| D | dml21_utils.c | 65 …if (dml_ctx->v21.mode_programming.programming->plane_programming[i].plane_descriptor->stream_index… in find_valid_pipe_idx_for_stream_index()
105 …dml_stream_index = dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_idx].pla… in dml21_find_dc_pipes_for_plane()
330 …for (dml_stream_index = 0; dml_stream_index < dml_ctx->v21.mode_programming.programming->display_c… in dml21_handle_phantom_streams_planes()
332 …if (dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index].phantom_stream… in dml21_handle_phantom_streams_planes()
347 &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index]); in dml21_handle_phantom_streams_planes()
353 …for (dml_plane_index = 0; dml_plane_index < dml_ctx->v21.mode_programming.programming->display_con… in dml21_handle_phantom_streams_planes()
354 …if (dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_index].plane_descriptor… in dml21_handle_phantom_streams_planes()
365 &dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_index]); in dml21_handle_phantom_streams_planes()
389 if (dml_ctx->v21.mode_programming.programming->fams2_required) { in dml21_build_fams2_programming()
415 … &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_idx].fams2_base_params, in dml21_build_fams2_programming()
[all …]
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| D | dml21_translation_helper.c | 726 // Placeholder for programming the array_mode in populate_dml21_surface_config_from_plane_state()
1077 …context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1078 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
1079 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1080 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()
1081 …context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks… in dml21_copy_clocks_to_dc_state()
1082 …context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dc… in dml21_copy_clocks_to_dc_state()
1083 …context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_c… in dml21_copy_clocks_to_dc_state()
1084 …context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming-… in dml21_copy_clocks_to_dc_state()
1085 …context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk… in dml21_copy_clocks_to_dc_state()
[all …]
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| /linux-6.15/Documentation/driver-api/fpga/ |
| D | fpga-programming.rst | 1 In-kernel API for FPGA Programming
7 The in-kernel API for FPGA programming is a combination of APIs from
9 trigger FPGA programming is fpga_region_program_fpga().
31 bridges to control during programming or it has a pointer to a function that
71 /* Add info to region and do the programming */
84 API for programming an FPGA
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| D | fpga-region.rst | 20 enumeration after programming.
24 * which FPGA manager to use to do the programming
26 * which bridges to disable before programming and enable afterwards.
60 Manager it will be using to do the programming. This usually would happen
68 The FPGA region will need to specify which bridges to control while programming
71 the list of bridges to program just before programming
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| D | intro.rst | 26 If you are adding a new FPGA or a new method of programming an FPGA,
36 region of an FPGA during programming. They are disabled before
37 programming begins and re-enabled afterwards. An FPGA bridge may be
|
| /linux-6.15/drivers/net/wireless/rsi/ |
| D | rsi_boot_params.h | 58 /* structure to store configs related to TAPLL programming */
64 /* structure to store configs related to PLL960 programming */
71 /* structure to store configs related to AFEPLL programming */
92 /* structure to store configs related to UMAC clk programming */
149 /* WDT programming values */
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| /linux-6.15/tools/memory-model/Documentation/ |
| D | references.txt | 34 Proceedings of the 32Nd ACM SIGPLAN Conference on Programming
41 ACM SIGPLAN Conference on Programming Language Design and
56 SIGPLAN-SIGACT Symposium on Principles of Programming Languages
63 Principles of Programming Languages (POPL 2017). ACM, New York,
69 Proceedings of the ACM on Programming Languages, Volume 2, Issue
92 Programming Languages and Operating Systems (ASPLOS 2018). ACM,
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| /linux-6.15/Documentation/misc-devices/ |
| D | c2port.rst | 26 C2 Interface used for in-system programming of micro controllers.
38 - AN127: FLASH Programming via the C2 Interface at
45 banging) designed to enable in-system programming, debugging, and
47 this code supports only flash programming but extensions are easy to
|
| /linux-6.15/Documentation/driver-api/soundwire/ |
| D | error_handling.rst | 16 Improvements could be invalidating an entire programming sequence and
22 that bus clashes due to programming errors (two streams using the same bit
34 be applied. In case of a bad programming (command sent to non-existent
38 backtracking and restarting the entire programming sequence might be a
|
| /linux-6.15/drivers/net/ethernet/intel/i40e/ |
| D | i40e_txrx_common.h | 87 * i40e_rx_is_programming_status - check for programming status descriptor
91 * is a programming status descriptor for flow director or FCoE
97 /* The Rx filter programming status and SPH bit occupy the same in i40e_rx_is_programming_status()
100 * programming status descriptor. in i40e_rx_is_programming_status()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| D | dml_top.h | 31 * Determines the full (optimized) programming for the input mode. Returns minimum
32 * clocks as well as dchub register programming values for all pipes, additional meta
38 * Determines the correct per pipe mcache register programming for a valid mode.
|
| /linux-6.15/Documentation/process/ |
| D | kernel-docs.rst | 63 * Title: **The Linux Kernel Module Programming Guide**
72 programming. Lots of examples. Currently the new version is being
107 …* Title: **Linux Kernel Programming: A Comprehensive Guide to Kernel Internals, Writing Kernel Mod…
115 …* Title: **Linux Kernel Programming Part 2 - Char Device Drivers and Kernel Synchronization: Creat…
123 * Title: **Linux System Programming: Talking Directly to the Kernel and C Library**
273 other programming languages. I try to be comprehensive enough to be
306 the Rust Programming Language on "Bare Metal" embedded systems,
326 the programming language Rust—from scratch! Apart from this spiffy
373 the Rust programming language.
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| D | programming-language.rst | 3 Programming Language
6 The kernel is written in the C programming language [c-language]_.
37 The kernel has experimental support for the Rust programming language
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/ |
| D | dml2_top_soc15.c | 322 * Takes an input set of mcache boundaries and finds the appropriate setting of cache programming.
323 * Returns true if a valid set of programming can be made, and false otherwise. "Valid" means
779 …ruct dml2_display_cfg_programming *dpmm_programming = &dml->dpmm_instance.dpmm_scratch.programming; in dml2_top_soc15_check_mode_supported()
812 l->dppm_map_mode_params.programming = dpmm_programming; in dml2_top_soc15_check_mode_supported()
836 memset(in_out->programming, 0, sizeof(struct dml2_display_cfg_programming)); in dml2_top_soc15_build_mode_programming()
838 …memcpy(&in_out->programming->display_config, in_out->display_config, sizeof(struct dml2_display_cf… in dml2_top_soc15_build_mode_programming()
862 l->informative_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
901 l->informative_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
906 in_out->programming->informative.failed_mcache_validation = true; in dml2_top_soc15_build_mode_programming()
984 l->dppm_map_mode_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
[all …]
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| /linux-6.15/drivers/usb/dwc2/ |
| D | core.c | 35 * @hsotg: Programming view of the DWC_otg controller
68 * @hsotg: Programming view of the DWC_otg controller
104 * @hsotg: Programming view of the DWC_otg controller
130 * @hsotg: Programming view of the DWC_otg controller
143 * @hsotg: Programming view of the DWC_otg controller
211 * @hsotg: Programming view of the DWC_otg controller
289 * @hsotg: Programming view of the DWC_otg controller.
330 * @hsotg: Programming view of DWC_otg controller
363 * @hsotg: Programming view of the DWC_otg controller
379 * @hsotg: Programming view of the DWC_otg controller
[all …]
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| /linux-6.15/drivers/misc/c2port/ |
| D | core.c | 497 /* Target the C2 flash programming control register for C2 data in __c2port_store_flash_access()
501 /* Write the first keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
506 /* Write the second keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
512 * C2 flash programming */ in __c2port_store_flash_access()
535 dev_err(c2dev->dev, "cannot enable %s flash programming\n", in c2port_store_flash_access()
550 /* Target the C2 flash programming data register for C2 data register in __c2port_write_flash_erase()
570 /* Read flash programming interface status */ in __c2port_write_flash_erase()
644 /* Target the C2 flash programming data register for C2 data register in __c2port_read_flash_data()
663 /* Read flash programming interface status */ in __c2port_read_flash_data()
695 /* Read flash programming interface status */ in __c2port_read_flash_data()
[all …]
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| /linux-6.15/drivers/gpu/drm/ |
| D | drm_vblank_work.c | 18 * simply do said time-sensitive programming in the driver's IRQ handler,
21 * time-critical programming independently of the CPU.
24 * doesn't need to be concerned with extremely time-sensitive programming,
26 * hardware may require that certain time-sensitive programming be handled
27 * completely by the CPU, and said programming may even take too long to
41 * time-sensitive hardware programming on time, even when the system is under
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| /linux-6.15/include/soc/at91/ |
| D | sama7-ddr.h | 73 #define UDDRC_SWCTRL (0x320) /* UDDRC Software Register Programming Control Enable */
74 #define UDDRC_SWCTRL_SW_DONE (1 << 0) /* Enable quasi-dynamic register programming outside reset …
76 #define UDDRC_SWSTAT (0x324) /* UDDRC Software Register Programming Control Status */
77 #define UDDRC_SWSTAT_SW_DONE_ACK (1 << 0) /* Register programming done */
|
| /linux-6.15/Documentation/input/ |
| D | input_kapi.rst | 12 input-programming
13 gameport-programming
|
| /linux-6.15/drivers/fpga/tests/ |
| D | fpga-region-test.c | 62 * of programming cycles. The internals of the programming sequence are
114 * FPGA Region programming test. The Region must call get_bridges() to get
115 * and control the bridges, and then the Manager for the actual programming.
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | display_mode_core_structs.h | 657 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
664 /// @brief To control the clk usage for model programming
686 struct dml_hw_resource_st hw; //< brief for mode programming
687 struct dml_clk_cfg_st clk_overrides; //< brief for mode programming clk override
690 /// @brief DML mode evaluation and programming policy
691 /// Those knobs that affect mode support and mode programming
704 … support the given display configuration. User can tell use the output DCFCLK for mode programming.
726 …t immediate flip at the max combine setting; determine in mode support and used in mode programming
793 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
822 // Physical info; only using for programming
[all …]
|