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/src/sys/contrib/device-tree/Bindings/gpu/host1x/
H A Dnvidia,tegra210-nvenc.yaml4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
7 title: NVIDIA Tegra NVENC
10 NVENC is the hardware video encoder present on NVIDIA Tegra210
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
26 - nvidia,tegra194-nvenc
36 - const: nvenc
43 - const: nvenc
83 - nvidia,tegra210-nvenc
[all …]
/src/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra194.dtsi2090 nvenc@154c0000 {
2091 compatible = "nvidia,tegra194-nvenc";
2094 clock-names = "nvenc";
2096 reset-names = "nvenc";
2245 nvenc@15a80000 {
2246 compatible = "nvidia,tegra194-nvenc";
2249 clock-names = "nvenc";
2251 reset-names = "nvenc";
H A Dtegra186.dtsi1730 nvenc@154c0000 {
1731 compatible = "nvidia,tegra186-nvenc";
1734 clock-names = "nvenc";
1736 reset-names = "nvenc";
H A Dtegra210.dtsi283 nvenc@544c0000 {
284 compatible = "nvidia,tegra210-nvenc";
/src/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_per.c472 GATE(NVENC, "nvenc", "clk_m", Y(27)),
H A Dtegra210_clk_pll.c328 /* PLLC3: 510 MHz Clock source for NVENC, NVDEC scaling */
/src/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra186-clock.h878 /** @brief NAFLL clock source for NVENC */
H A Dtegra234-clock.h396 /** @brief NAFLL clock source for NVENC */