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/linux-5.10/arch/arm/mach-imx/
Dcpu-imx31.c3 * MX31 CPU type detection
23 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
24 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
26 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
30 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
55 imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN); in mx31_read_cpu_rev()
Dmm-imx3.c7 * - add MX31 specific definitions
75 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
76 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
77 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
78 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
79 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
DKconfig55 bool "i.MX31 support"
59 This enables support for Freescale i.MX31 processor
66 This enables support for Freescale i.MX31 processor
Dhardware.h54 * mx31:
97 #include "mx31.h"
Dmach-imx31.c14 DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
Dmx3x.h11 * MX31 memory map:
182 #define MX3x_PROD_SIGNATURE 0x1 /* For MX31 */
/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx31-clock.yaml7 title: Clock bindings for Freescale i.MX31
14 ID in its "clocks" phandle cell. The following is a full list of i.MX31
/linux-5.10/arch/arm/boot/dts/
Dimx31-bug.dts10 model = "Buglabs i.MX31 Bug 1.x";
Dimx31-lite.dts13 model = "LogicPD i.MX31 Lite";
/linux-5.10/include/soc/imx/
Dtimer.h12 GPT_TYPE_IMX31, /* i.MX31/35/25/37/51/6Q */
/linux-5.10/Documentation/w1/masters/
Dmxc-w1.rst7 * Freescale MX27, MX31 and probably other i.MX SoCs
/linux-5.10/Documentation/devicetree/bindings/sound/
Dimx-audmux.txt7 firstly used on i.MX31.
/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dimx-iim.yaml14 i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
/linux-5.10/include/dt-bindings/sound/
Dfsl-imx-audmux.h29 * TFCSEL/RFCSEL (i.MX27) or TFSEL/TCSEL/RFSEL/RCSEL (i.MX31/51/53/6Q)
/linux-5.10/drivers/clk/imx/
Dclk-pllv1.c68 * i.MX21, i.MX27 and i,MX31 in clk_pllv1_recalc_rate()
/linux-5.10/Documentation/devicetree/bindings/bus/
Dimx-weim.txt59 For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
/linux-5.10/drivers/soc/imx/
Dsoc-imx.c65 soc_id = "i.MX31"; in imx_soc_device_init()
/linux-5.10/drivers/clocksource/
Dtimer-imx-gpt.c25 * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0)
46 /* MX31, MX35, MX25, MX5, MX6 */
/linux-5.10/drivers/mfd/
Dmc13xxx-spi.c109 * and on i.Mx31 SoC (the target SoC for MC13783 PMIC) the SPI controller
/linux-5.10/drivers/dma/ipu/
Dipu_irq.c185 * The source parameter has to be explained further. On i.MX31 IPU has 137 IRQ
/linux-5.10/drivers/dma/
DKconfig450 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
/linux-5.10/drivers/gpio/
Dgpio-mxc.c30 IMX31_GPIO, /* runs on i.mx31 */
/linux-5.10/Documentation/devicetree/bindings/arm/
Dfsl.yaml65 - description: i.MX31 based Boards
/linux-5.10/arch/arm/
DKconfig.debug419 bool "i.MX31 Debug UART"
423 on i.MX31.
/linux-5.10/drivers/spi/
Dspi-imx.c197 /* MX1, MX31, MX35, MX51 CSPI */
976 /* i.mx35 and later cspi shares the functions with i.mx31 one */

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