Home
last modified time | relevance | path

Searched full:mpu (Results 1 – 25 of 302) sorted by relevance

12345678910>>...13

/linux-5.10/sound/drivers/mpu401/
Dmpu401_uart.c4 * Routines for control of MPU-401 in UART mode
6 * MPU-401 supports UART mode which is not capable generate transmit
12 * are port and mmio. For other kind of I/O, set mpu->read and
13 * mpu->write to your own I/O functions.
28 MODULE_DESCRIPTION("Routines for control of MPU-401 in UART mode");
31 static void snd_mpu401_uart_input_read(struct snd_mpu401 * mpu);
32 static void snd_mpu401_uart_output_write(struct snd_mpu401 * mpu);
38 #define snd_mpu401_input_avail(mpu) \ argument
39 (!(mpu->read(mpu, MPU401C(mpu)) & MPU401_RX_EMPTY))
40 #define snd_mpu401_output_ready(mpu) \ argument
[all …]
Dmpu401.c3 * Driver for generic MPU-401 boards (UART mode only)
18 MODULE_DESCRIPTION("MPU-401 UART");
27 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* MPU-401 port number */
28 static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* MPU-401 IRQ */
32 MODULE_PARM_DESC(index, "Index value for MPU-401 device.");
34 MODULE_PARM_DESC(id, "ID string for MPU-401 device.");
36 MODULE_PARM_DESC(enable, "Enable MPU-401 device.");
39 MODULE_PARM_DESC(pnp, "PnP detection for MPU-401 device.");
42 MODULE_PARM_DESC(port, "Port # for MPU-401 device.");
44 MODULE_PARM_DESC(irq, "IRQ # for MPU-401 device.");
[all …]
/linux-5.10/sound/isa/msnd/
Dmsnd_midi.c5 * Routines for control of MPU-401 in UART mode
7 * MPU-401 supports UART mode which is not capable generate transmit
43 struct snd_msndmidi *mpu; in snd_msndmidi_input_open() local
47 mpu = substream->rmidi->private_data; in snd_msndmidi_input_open()
49 mpu->substream_input = substream; in snd_msndmidi_input_open()
51 snd_msnd_enable_irq(mpu->dev); in snd_msndmidi_input_open()
53 snd_msnd_send_dsp_cmd(mpu->dev, HDEX_MIDI_IN_START); in snd_msndmidi_input_open()
54 set_bit(MSNDMIDI_MODE_BIT_INPUT, &mpu->mode); in snd_msndmidi_input_open()
60 struct snd_msndmidi *mpu; in snd_msndmidi_input_close() local
62 mpu = substream->rmidi->private_data; in snd_msndmidi_input_close()
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/omap/
Dmpu.txt1 * TI - MPU (Main Processor Unit) subsystem
3 The MPU subsystem contain one or several ARM cores
5 The MPU contain CPUs, GIC, L2 cache and a local PRCM.
8 - compatible : Should be "ti,omap3-mpu" for OMAP3
9 Should be "ti,omap4-mpu" for OMAP4
10 Should be "ti,omap5-mpu" for OMAP5
11 - ti,hwmods: "mpu"
27 mpu {
28 compatible = "ti,omap5-mpu";
29 ti,hwmods = "mpu"
[all …]
/linux-5.10/include/sound/
Dmpu401.h6 * Header file for MPU-401 and compatible cards
14 #define MPU401_HW_SB 2 /* SoundBlaster MPU-401 UART */
15 #define MPU401_HW_ES1688 3 /* AudioDrive ES1688 MPU-401 UART */
19 #define MPU401_HW_ES18XX 7 /* AudioDrive ES18XX MPU-401 UART */
27 #define MPU401_HW_CMIPCI 15 /* CMIPCI MPU-401 UART */
61 unsigned long port; /* base port of MPU-401 chip */
64 int irq; /* IRQ number of MPU-401 chip */
69 int (*open_input) (struct snd_mpu401 * mpu);
70 void (*close_input) (struct snd_mpu401 * mpu);
71 int (*open_output) (struct snd_mpu401 * mpu);
[all …]
/linux-5.10/sound/isa/wavefront/
Dwavefront_midi.c8 * Note that there is also an MPU-401 emulation (actually, a UART-401
25 * something other than 0 and 1 if the CS4232 UART/MPU-401 interface
115 snd_wavefront_mpu_id mpu; in snd_wavefront_midi_output_write() local
191 mpu = midi->output_mpu ^ mask; in snd_wavefront_midi_output_write()
193 if ((midi->mode[mpu] & MPU401_MODE_OUTPUT) == 0) { in snd_wavefront_midi_output_write()
197 if (snd_rawmidi_transmit_empty(midi->substream_output[mpu])) in snd_wavefront_midi_output_write()
200 if (mpu != midi->output_mpu) { in snd_wavefront_midi_output_write()
201 write_data(midi, mpu == internal_mpu ? in snd_wavefront_midi_output_write()
204 midi->output_mpu = mpu; in snd_wavefront_midi_output_write()
205 } else if (snd_rawmidi_transmit(midi->substream_output[mpu], &midi_byte, 1) == 1) { in snd_wavefront_midi_output_write()
[all …]
Dwavefront.c62 MODULE_PARM_DESC(cs4232_mpu_port, "port # for CS4232 MPU-401 interface.");
64 MODULE_PARM_DESC(cs4232_mpu_irq, "IRQ # for CS4232 MPU-401 interface.");
72 MODULE_PARM_DESC(use_cs4232_midi, "Use CS4232 MPU-401 interface (inaccessibly located inside your c…
115 acard->mpu = pnp_request_card_device(card, id->devs[2].id, NULL); in snd_wavefront_pnp()
116 if (acard->mpu == NULL) in snd_wavefront_pnp()
167 /* CS4232 MPU initialization. Configure this only if in snd_wavefront_pnp()
174 pdev = acard->mpu; in snd_wavefront_pnp()
185 snd_printk (KERN_INFO "CS4232 MPU: port=0x%lx, irq=%i\n", in snd_wavefront_pnp()
276 snd_wavefront_mpu_id mpu) in snd_wavefront_new_midi() argument
294 if (mpu == internal_mpu) { in snd_wavefront_new_midi()
[all …]
/linux-5.10/sound/pci/emu10k1/
Demumpu401.c4 * Routines for control of EMU10K1 MPU-401 in UART mode
16 struct snd_emu10k1_midi *mpu, int idx) in mpu401_read() argument
19 return (unsigned char)snd_emu10k1_ptr_read(emu, mpu->port + idx, 0); in mpu401_read()
21 return inb(emu->port + mpu->port + idx); in mpu401_read()
25 struct snd_emu10k1_midi *mpu, int data, int idx) in mpu401_write() argument
28 snd_emu10k1_ptr_write(emu, mpu->port + idx, 0, data); in mpu401_write()
30 outb(data, emu->port + mpu->port + idx); in mpu401_write()
33 #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0) argument
34 #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1) argument
35 #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0) argument
[all …]
/linux-5.10/arch/arm/mach-omap2/
Dcpuidle34xx.c49 * OMAP_CPUIDLE_CX_NO_CLKDM_IDLE: don't allow the MPU clockdomain to go
50 * inactive. This in turn prevents the MPU DPLL from entering autoidle
272 .desc = "MPU ON + CORE ON",
279 .desc = "MPU ON + CORE ON",
286 .desc = "MPU RET + CORE ON",
293 .desc = "MPU OFF + CORE ON",
300 .desc = "MPU RET + CORE RET",
307 .desc = "MPU OFF + CORE RET",
314 .desc = "MPU OFF + CORE OFF",
335 .desc = "MPU ON + CORE ON",
[all …]
Domap4-common.c61 * data writes from the MPU. These asynchronous bridges can be found on
62 * paths between the MPU to EMIF, and the MPU to L3 interconnects.
75 * The mb() and wmb() barriers only operate only on the MPU->MA->EMIF
96 * Async bridges can be found on paths between MPU to EMIF and MPU to L3
108 * In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
113 * operates on both the MPU->MA->EMIF path but also the MPU->OCP path
133 np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); in omap4_sram_init()
294 { .compatible = "ti,omap4-wugen-mpu", },
295 { .compatible = "ti,omap5-wugen-mpu", },
Domap_hwmod_54xx_data.c233 * 'mpu' class
234 * mpu sub-system
238 .name = "mpu",
241 /* mpu */
243 .name = "mpu",
337 /* mpu -> l3_main_1 */
409 /* mpu -> mpu_private */
417 /* mpu -> emif1 */
425 /* mpu -> emif2 */
433 /* l4_cfg -> mpu */
Dclockdomains3xxx_data.c70 /* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
88 /* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
124 /* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
135 /* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
143 /* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
157 /* 3430: PM_WKDEP_NEON: MPU */
165 /* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
177 /* 3430: CM_SLEEPDEP_PER: MPU, IVA */
189 /* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
201 /* 3430: CM_SLEEPDEP_CAM: MPU */
[all …]
Domap_hwmod_44xx_data.c477 * 'mpu' class
478 * mpu sub-system
482 .name = "mpu",
485 /* mpu */
487 .name = "mpu",
526 * + clock manager 1 (in always on power domain) + local prm in mpu
639 /* mpu -> dmm */
687 /* mpu -> l3_main_1 */
783 /* mpu -> mpu_private */
927 /* mpu -> emif1 */
[all …]
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dti,omap4-wugen-mpu5 is also referred to as "WUGEN-MPU", hence the name of the binding.
9 - compatible : should contain at least "ti,omap4-wugen-mpu" or
10 "ti,omap5-wugen-mpu"
26 compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
/linux-5.10/arch/arm/mm/
Dpmsa-v7.c14 #include <asm/mpu.h>
137 /* ARMv7-M only supports a unified MPU, so I-side operations are nop */
230 /* MPU initialisation functions */
299 pr_debug("MPU: base %pa size %pa disable subregions: %*pbl\n", in pmsav7_adjust_lowmem_bounds()
304 pr_warn("Truncating memory from %pa to %pa (MPU region constraints)", in pmsav7_adjust_lowmem_bounds()
352 /* If the MPU is non-unified, we use the larger of the two minima*/ in __mpu_min_region_order()
358 isb(); /* Ensure that MPU region operations have completed */ in __mpu_min_region_order()
370 /* We kept a region free for probing resolution of MPU regions*/ in mpu_setup_region()
416 * Set up default MPU regions, doing nothing if there is no MPU
422 /* Setup MPU (order is important) */ in pmsav7_setup()
[all …]
/linux-5.10/arch/arm/
DKconfig-nommu57 bool 'Use the ARM v7 PMSA Compliant MPU'
62 Unit (MPU) that defines the type and permissions for regions of
65 If your CPU has an MPU then you should choose 'y' here unless you
66 know that you do not want to use the MPU.
/linux-5.10/arch/arm/kernel/
Dvmlinux-xip.lds.S16 #include <asm/mpu.h>
180 * space spawns multiple MPU regions thus it is likely we run in
181 * situation when we are reprogramming MPU region we run on with
183 * as we update MPU settings we'd immediately try to execute straight
189 ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
190 ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
Dhead-nommu.S21 #include <asm/mpu.h>
109 bl __secondary_setup_mpu @ Initialize the MPU
167 orreq r0, r0, #CR_M @ Set SCTRL.M (MPU on)
215 /* Set which MPU region should be programmed */
221 /* Setup a single MPU region, either D or I side (D-side for unified) */
242 * Setup the MPU and initial MPU Regions. We create the following regions:
243 * Region 0: Use this for probing the MPU details, so leave disabled.
283 ands r5, r0, #MPUIR_DREGION_SZMASK @ 0 size d region => No MPU
454 /* Use MPU region info supplied by __cpu_up */
474 ands r5, r0, #MPUIR_DREGION_SZMASK @ 0 size d region => No MPU
/linux-5.10/drivers/macintosh/
Dwindfarm_ad7417_sensor.c31 const struct mpu_data *mpu; member
84 *value = (raw * (s32)pv->mpu->mdiode + in wf_ad7417_adc_convert()
85 ((s32)pv->mpu->bdiode << 12)) >> 2; in wf_ad7417_adc_convert()
236 const struct mpu_data *mpu; in wf_ad7417_probe() local
258 mpu = wf_get_mpu(cpu_nr); in wf_ad7417_probe()
259 if (!mpu) { in wf_ad7417_probe()
260 dev_err(&client->dev, "Failed to retrieve MPU data\n"); in wf_ad7417_probe()
272 pv->mpu = mpu; in wf_ad7417_probe()
Dwindfarm_rm31.c296 const struct mpu_data *mpu = cpu_mpu_data[cpu]; in cpu_setup_pid() local
300 /* Get PID params from the appropriate MPU EEPROM */ in cpu_setup_pid()
301 tmax = mpu->tmax << 16; in cpu_setup_pid()
302 ttarget = mpu->ttarget << 16; in cpu_setup_pid()
303 ptarget = ((s32)(mpu->pmaxh - mpu->padjmax)) << 16; in cpu_setup_pid()
318 hsize = min_t(int, mpu->tguardband, WF_PID_MAX_HISTORY); in cpu_setup_pid()
324 pid.gd = mpu->pid_gd; in cpu_setup_pid()
325 pid.gp = mpu->pid_gp; in cpu_setup_pid()
326 pid.gr = mpu->pid_gr; in cpu_setup_pid()
705 /* Get MPU data for each CPU */ in wf_rm31_init()
[all …]
Dwindfarm_pm72.c395 const struct mpu_data *mpu = cpu_mpu_data[cpu]; in cpu_setup_pid() local
399 /* Get PID params from the appropriate MPU EEPROM */ in cpu_setup_pid()
400 tmax = mpu->tmax << 16; in cpu_setup_pid()
401 ttarget = mpu->ttarget << 16; in cpu_setup_pid()
402 ptarget = ((s32)(mpu->pmaxh - mpu->padjmax)) << 16; in cpu_setup_pid()
417 hsize = min_t(int, mpu->tguardband, WF_PID_MAX_HISTORY); in cpu_setup_pid()
423 pid.gd = mpu->pid_gd; in cpu_setup_pid()
424 pid.gp = mpu->pid_gp; in cpu_setup_pid()
425 pid.gr = mpu->pid_gr; in cpu_setup_pid()
813 /* Get MPU data for each CPU */ in wf_pm72_init()
[all …]
/linux-5.10/Documentation/arm/omap/
Domap_pm.rst34 1. Set the maximum MPU wakeup latency::
87 set_max_mpu_wakeup_lat() function to constrain the MPU wakeup
92 /* Limit MPU wakeup latency */
119 CPUFreq expresses target MPU performance levels in terms of MPU
121 specialized cases to convert that input information (OPPs/MPU
/linux-5.10/Documentation/devicetree/bindings/power/
Dti-smartreflex.txt10 "ti,omap3-smartreflex-mpu-iva"
12 "ti,omap4-smartreflex-mpu"
43 compatible = "ti,omap4-smartreflex-mpu";
/linux-5.10/sound/pci/au88x0/
Dau88x0_mpu401.c4 * Routines for control of MPU-401 in UART mode
34 struct snd_mpu401 *mpu; in snd_vortex_midi() local
90 mpu = rmidi->private_data; in snd_vortex_midi()
91 mpu->cport = (unsigned long)(vortex->mmio + VORTEX_MIDI_CMD); in snd_vortex_midi()
/linux-5.10/Documentation/devicetree/bindings/
Dresource-names.txt27 ranges = <0 0 0x48000000 0x00001000>, /* MPU path */
33 reg-names = "mpu", "dat",
42 reg-names = "mpu", "dma";

12345678910>>...13