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/linux-5.10/drivers/clk/imx/
Dclk-imx8qxp-lpcg.c17 #include "clk-imx8qxp-lpcg.h"
22 * struct imx8qxp_lpcg_data - Description of one LPCG clock
27 * @offset: offset of this LPCG clock
28 * @bit_idx: bit index of this LPCG clock
31 * This structure describes one LPCG clock
44 * struct imx8qxp_ss_lpcg - Description of one subsystem LPCG clocks
45 * @lpcg: LPCG clocks array of one subsystem
46 * @num_lpcg: the number of LPCG clocks
47 * @num_max: the maximum number of LPCG clocks
49 * This structure describes each subsystem LPCG clocks information
[all …]
Dclk-lpcg-scu.c23 * struct clk_lpcg_scu - Description of LPCG clock
25 * @hw: clk_hw of this LPCG
26 * @reg: register of this LPCG clock
27 * @bit_idx: bit index of this LPCG clock
30 * This structure describes one LPCG clock
DMakefile29 obj-$(CONFIG_MXC_CLK_SCU) += clk-imx-scu.o clk-imx-lpcg-scu.o
31 clk-imx-lpcg-scu-$(CONFIG_CLK_IMX8QXP) += clk-lpcg-scu.o clk-imx8qxp-lpcg.o
/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx8qxp-lpcg.yaml4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
14 model to control the clock gates for the peripherals. An LPCG module
29 - fsl,imx8qxp-lpcg-adma
30 - fsl,imx8qxp-lpcg-conn
31 - fsl,imx8qxp-lpcg-dc
32 - fsl,imx8qxp-lpcg-dsp
33 - fsl,imx8qxp-lpcg-gpu
34 - fsl,imx8qxp-lpcg-hsio
[all …]
/linux-5.10/include/dt-bindings/clock/
Dimx8-clock.h136 /* LPCG clocks */
138 /* LSIO SS LPCG */
215 /* Connectivity SS LPCG */
244 /* ADMA SS LPCG */
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8qxp.dtsi233 compatible = "fsl,imx8qxp-lpcg-adma";
359 compatible = "fsl,imx8qxp-lpcg-conn";
594 compatible = "fsl,imx8qxp-lpcg-lsio";