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/linux-5.10/include/linux/soc/qcom/
Dllcc-qcom.h32 * @slice_id: llcc slice id
33 * @slice_size: Size allocated for the llcc slice
41 * llcc_edac_reg_data - llcc edac registers data for each error type
65 * llcc_drv_data - Data associated with the llcc driver
66 * @regmap: regmap associated with the llcc device
67 * @bcast_regmap: regmap associated with llcc broadcast offset
72 * @num_banks: Number of llcc banks
75 * @ecc_irq: interrupt for llcc cache error detection and reporting
92 * llcc_slice_getd - get llcc slice descriptor
98 * llcc_slice_putd - llcc slice descritpor
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.yaml4 $id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml#
14 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
24 - qcom,sc7180-llcc
25 - qcom,sdm845-llcc
29 - description: LLCC base register region
30 - description: LLCC broadcast base register region
53 compatible = "qcom,sdm845-llcc";
/linux-5.10/drivers/soc/qcom/
Dllcc-qcom.c19 #include <linux/soc/qcom/llcc-qcom.h>
51 * llcc_slice_config - Data associated with the llcc slice
53 * @slice_id: llcc slice id for each client
67 * When configured to 0 all ways in llcc are probed.
135 * llcc_slice_getd - get llcc slice descriptor
138 * A pointer to llcc slice descriptor will be returned on success and
172 * llcc_slice_putd - llcc slice descritpor
173 * @desc: Pointer to llcc slice descriptor
217 * llcc_slice_activate - Activate the llcc slice
218 * @desc: Pointer to llcc slice descriptor
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DKconfig64 tristate "Qualcomm Technologies, Inc. LLCC driver"
68 Last Level Cache Controller(LLCC) driver for platforms such as,
69 SDM845. This provides interfaces to clients that use the LLCC.
70 Say yes here to enable LLCC slice driver.
DMakefile25 obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
/linux-5.10/drivers/edac/
Dqcom_edac.c12 #include <linux/soc/qcom/llcc-qcom.h>
265 "LLCC Data RAM correctable Error"); in dump_syn_reg()
269 "LLCC Data RAM uncorrectable Error"); in dump_syn_reg()
273 "LLCC Tag RAM correctable Error"); in dump_syn_reg()
277 "LLCC Tag RAM uncorrectable Error"); in dump_syn_reg()
348 edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank", in qcom_llcc_edac_probe()
359 edev_ctl->ctl_name = "llcc"; in qcom_llcc_edac_probe()
DKconfig511 As of now, it supports error reporting for Last Level Cache Controller (LLCC)
/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_core_perf.h20 * @DPU_CORE_PERF_DATA_BUS_ID_LLCC: MNOC/LLCC data bus
21 * @DPU_CORE_PERF_DATA_BUS_ID_EBI: LLCC/EBI data bus
Ddpu_crtc.h184 * @bw_split_vote : true if bw controlled by llcc/dram bw properties
Ddpu_hw_catalog.h647 * @min_llcc_ib minimum llcc ib vote in kbps
/linux-5.10/drivers/net/ethernet/sun/
Dcassini.h2200 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, \
2298 { "LLCc?",0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S3_CLNP,
2378 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,
2434 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi2649 compatible = "qcom,sc7180-llcc";
Dsdm845.dtsi1798 compatible = "qcom,sdm845-llcc";