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/linux-6.8/drivers/video/fbdev/omap/
Dlcdc.c28 #include "lcdc.h"
31 #define MODULE_NAME "lcdc"
69 } lcdc; variable
73 lcdc.irq_mask |= mask; in enable_irqs()
78 lcdc.irq_mask &= ~mask; in disable_irqs()
109 l |= lcdc.irq_mask | OMAP_LCDC_IRQ_DONE; /* enabled IRQs */ in enable_controller()
131 init_completion(&lcdc.last_frame_complete); in disable_controller()
133 if (!wait_for_completion_timeout(&lcdc.last_frame_complete, in disable_controller()
135 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in disable_controller()
146 dev_err(lcdc.fbdev->dev, in reset_controller()
[all …]
/linux-6.8/drivers/gpu/drm/imx/lcdc/
Dimx-lcdc.c26 #define IMX21LCDC_LSSAR 0x0000 /* LCDC Screen Start Address Register */
27 #define IMX21LCDC_LSR 0x0004 /* LCDC Size Register */
28 #define IMX21LCDC_LVPWR 0x0008 /* LCDC Virtual Page Width Register */
29 #define IMX21LCDC_LCPR 0x000C /* LCDC Cursor Position Register */
30 #define IMX21LCDC_LCWHB 0x0010 /* LCDC Cursor Width Height and Blink Register*/
31 #define IMX21LCDC_LCCMR 0x0014 /* LCDC Color Cursor Mapping Register */
32 #define IMX21LCDC_LPCR 0x0018 /* LCDC Panel Configuration Register */
33 #define IMX21LCDC_LHCR 0x001C /* LCDC Horizontal Configuration Register */
34 #define IMX21LCDC_LVCR 0x0020 /* LCDC Vertical Configuration Register */
35 #define IMX21LCDC_LPOR 0x0024 /* LCDC Panning Offset Register */
[all …]
/linux-6.8/Documentation/devicetree/bindings/display/
Datmel,lcdc.txt1 Atmel LCDC Framebuffer
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
30 compatible = "atmel,at91sam9g45-lcdc";
44 compatible = "atmel,at91sam9263-lcdc";
49 Atmel LCDC Display
Drenesas,shmobile-lcdc.yaml4 $id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
7 title: Renesas SH-Mobile LCD Controller (LCDC)
16 - renesas,r8a7740-lcdc # R-Mobile A1
17 - renesas,sh73a0-lcdc # SH-Mobile AG5
85 const: renesas,r8a7740-lcdc
96 const: renesas,sh73a0-lcdc
110 compatible = "renesas,r8a7740-lcdc";
Dmarvell,pxa2xx-lcdc.txt6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
25 compatible = "marvell,pxa2xx-lcdc";
/linux-6.8/Documentation/devicetree/bindings/display/imx/
Dfsl,imx-lcdc.yaml4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
25 - const: fsl,imx25-lcdc
26 - const: fsl,imx21-lcdc
66 LCDC Sharp Configuration Register value.
74 - fsl,imx1-lcdc
75 - fsl,imx21-lcdc
104 lcdc@53fbc000 {
105 compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc";
/linux-6.8/drivers/video/fbdev/
Dsh_mobile_lcdcfb.c2 * SuperH Mobile LCDC Framebuffer
147 * struct sh_mobile_lcdc_overlay - LCDC display overlay
149 * @channel: LCDC channel this overlay belongs to
217 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
290 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_write_chan()
292 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan()
299 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan_mirror()
306 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_read_chan()
312 iowrite32(data, ovl->channel->lcdc->base + reg); in lcdc_write_overlay()
313 iowrite32(data, ovl->channel->lcdc->base + reg + SIDE_B_OFFSET); in lcdc_write_overlay()
[all …]
Dsh_mobile_lcdcfb.h44 struct sh_mobile_lcdc_chan *lcdc; member
49 * struct sh_mobile_lcdc_chan - LCDC display channel
57 struct sh_mobile_lcdc_priv *lcdc; member
Dsh7760fb.c3 * SH7760/SH7763 LCDC Framebuffer driver.
69 /* en/disable the LCDC */
216 /* calculate LCDC reg vals from display parameters */ in sh7760fb_set_par()
248 /* shut down LCDC before changing display parameters */ in sh7760fb_set_par()
419 "unusable for the LCDC\n", (unsigned long)par->fbdma); in sh7760fb_alloc_mem()
477 "sh7760-lcdc", &par->vsync); in sh7760fb_probe()
512 strcpy(info->fix.id, "sh7760-lcdc"); in sh7760fb_probe()
575 .name = "sh7760-lcdc",
Datmel_lcdfb.c267 /* Wait for the LCDC core to become idle */ in atmel_lcdfb_stop_nowait()
577 /* Now, the LCDC core... */ in atmel_lcdfb_set_par()
878 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
879 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
880 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
881 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
882 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
883 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
1068 /* Enable LCDC Clocks */ in atmel_lcdfb_probe()
1132 /* LCDC registers */ in atmel_lcdfb_probe()
[all …]
/linux-6.8/drivers/gpu/drm/tilcdc/
Dtilcdc_regs.h10 /* LCDC register definitions, based on da8xx-fb */
16 /* LCDC Status Register */
24 /* LCDC DMA Control Register */
39 /* LCDC Control Register */
44 /* LCDC Raster Control Register */
71 /* LCDC Raster Timing 2 Register */
83 /* LCDC Block */
DKconfig3 tristate "DRM Support for TI LCDC Display Controller"
12 Choose this option if you have an TI SoC with LCDC display
Dtilcdc_crtc.c81 * unlikely that LCDC would fetch the DMA addresses in the middle of in set_scanout()
106 /* Tell the LCDC where the palette is located. */ in tilcdc_crtc_load_palette()
124 /* Enable LCDC DMA and wait for palette to be loaded. */ in tilcdc_crtc_load_palette()
133 /* Disable LCDC DMA and DMA Palette Loaded Interrupt. */ in tilcdc_crtc_load_palette()
230 "failed to set the pixel clock - unable to read current lcdc clock rate\n"); in tilcdc_crtc_set_clk()
358 * be sure to set Bit 10 for the V2 LCDC controller, in tilcdc_crtc_set_mode()
1000 /* rev 1 lcdc appears to hang if irq is not disabled here */ in tilcdc_crtc_irq()
1008 /* Indicate to LCDC that the interrupt service routine has in tilcdc_crtc_irq()
/linux-6.8/drivers/pinctrl/qcom/
Dpinctrl-msm8660.c752 MSM_PIN_FUNCTION(lcdc),
773 PINGROUP(0, lcdc, dsub, _, _, _, _, _),
774 PINGROUP(1, lcdc, dsub, _, _, _, _, _),
775 PINGROUP(2, lcdc, dsub, _, _, _, _, _),
776 PINGROUP(3, lcdc, dsub, _, _, _, _, _),
777 PINGROUP(4, lcdc, dsub, _, _, _, _, _),
778 PINGROUP(5, lcdc, dsub, _, _, _, _, _),
779 PINGROUP(6, lcdc, dsub, _, _, _, _, _),
780 PINGROUP(7, lcdc, dsub, _, _, _, _, _),
781 PINGROUP(8, lcdc, dsub, _, _, _, _, _),
[all …]
/linux-6.8/arch/sh/include/asm/
Dsh7760fb.h3 * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver.
19 /* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */
96 /* Display types supported by the LCDC */
120 /* LCDC Pixclock sources */
128 /* LCDC pixclock input divider. Set to 1 at a minimum! */
182 /* set this member to 1 if you wish to use the LCDC's hardware
192 * more than the LCDC in terms of blanking (e.g. disable clock
/linux-6.8/Documentation/devicetree/bindings/display/tilcdc/
Dtilcdc.txt8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
21 This property deals with the LCDC revision 2 (found on AM335x)
41 tfp410 DVI encoder or lcd panel to lcdc
58 ti,hwmods = "lcdc";
/linux-6.8/Documentation/fb/
Dsh7760fb.rst2 SH7760/SH7763 integrated LCDC Framebuffer driver
7 The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which
48 The LCDC must explicitly be told about the type of LCD panel
126 .name = "sh7760-lcdc",
/linux-6.8/Documentation/devicetree/bindings/display/msm/
Dmdp4.yaml46 description: LCDC/LVDS
60 qcom,lcdc-align-lsb:
63 Indication that LSB alignment should be used for LCDC.
/linux-6.8/arch/sh/boards/mach-se/7722/
Dsetup.c160 /* LCDC I/O */ in se7722_setup()
168 /* LCDC */ in se7722_setup()
173 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */ in se7722_setup()
/linux-6.8/arch/sh/kernel/cpu/sh4/
Dsetup-sh7760.c27 USB, LCDC, enumerator
56 INTC_VECT(USB, 0xa00), INTC_VECT(LCDC, 0xa20),
90 SSI0, SSI1, HAC0, HAC1, I2C0, I2C1, USB, LCDC,
111 { 0xfe080008, 0, 32, 4, /* INTPRI08 */ { USB, LCDC, DMABRG, SCIF0,
/linux-6.8/arch/sh/kernel/cpu/sh3/
Dsetup-sh770x.c30 LCDC, PCC0, PCC1, enumerator
62 INTC_VECT(LCDC, 0x9a0),
83 { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
/linux-6.8/Documentation/devicetree/bindings/display/rockchip/
Drockchip,lvds.yaml53 const: lcdc
138 pinctrl-names = "lcdc";
/linux-6.8/drivers/gpu/drm/msm/disp/mdp4/
Dmdp4_kms.c201 * initialize LCDC encoder and LVDS connector) in mdp4_modeset_init_intf()
209 DRM_DEV_ERROR(dev->dev, "failed to construct LCDC encoder\n"); in mdp4_modeset_init_intf()
214 /* LCDC can be hooked to DMA_P (TODO: Add DMA_S later?) */ in mdp4_modeset_init_intf()
339 * LCDC/LVDS path: RGB1 -> DMA_P -> LCDC -> LVDS in modeset_init()
/linux-6.8/Documentation/devicetree/bindings/clock/
Dlpc1850-cgu.txt124 lcdc: lcdc@40008000 {
/linux-6.8/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7366.c267 VEU2, LCDC, enumerator
302 INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580),
325 { 0, TMU2, TMU1, TMU0, VEU2, 0, 0, LCDC } },
347 { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2, LCDC, ICB } },

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