/linux-5.10/Documentation/filesystems/ext4/ |
D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an 10 4KiB. You may experience mounting problems if block size is greater than 11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory 24 - 1KiB 25 - 2KiB 26 - 4KiB 27 - 64KiB 86 - 1KiB 87 - 2KiB 88 - 4KiB [all …]
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D | blockmap.rst | 8 …ct block: (file blocks 12 to (``$block_size`` / 4) + 11, or 12 to 1035 if 4KiB blocks) … 13 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | … 16 …block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 11, or 1036 to 1049611 if 4KiB blocks) … 21 …k_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) … 26 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | … 30 …``$block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 12, or 1049612 to 1074791436 if 4KiB blocks) | 35 …` / 4) | Map to (``$block_size`` / 4) double indirect blocks (1024 if 4KiB blocks) … 40 …k_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) … 45 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | |…
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/linux-5.10/arch/x86/platform/intel-quark/ |
D | imr_selftest.c | 56 * zero sized allocations and 1 KiB sized areas. 84 /* Test that a 1 KiB IMR @ zero with read/write all will bomb out. */ in imr_self_test() 87 imr_self_test_result(ret < 0, "1KiB IMR @ 0x00000000 - access-all\n"); in imr_self_test() 89 /* Test that a 1 KiB IMR @ zero with CPU only will work. */ in imr_self_test() 91 imr_self_test_result(ret >= 0, "1KiB IMR @ 0x00000000 - cpu-access\n"); in imr_self_test() 97 /* Test 2 KiB works. */ in imr_self_test() 100 imr_self_test_result(ret >= 0, "2KiB IMR @ 0x00000000\n"); in imr_self_test() 103 imr_self_test_result(ret == 0, "teardown 2KiB\n"); in imr_self_test()
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D | imr.c | 56 * 23:2 1 KiB aligned lo address 61 * 23:2 1 KiB aligned hi address 252 pr_err("base %pa size 0x%08zx must align to 1KiB\n", in imr_check_params() 292 * @base: physical base address of region aligned to 1KiB. 293 * @size: physical size of region in bytes must be aligned to 1KiB. 401 * @base: physical base address of region aligned to 1 KiB. 402 * @size: physical size of region in bytes aligned to 1 KiB. 493 * @base: physical base address of region aligned to 1 KiB. 494 * @size: physical size of region in bytes aligned to 1 KiB. 562 pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n", in imr_fixup_memmap() [all …]
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/linux-5.10/Documentation/arm/ |
D | tcm.rst | 8 This is usually just a few (4-64) KiB of RAM inside the ARM 15 The size of DTCM or ITCM is minimum 4KiB so the typical 16 minimum configuration is 4KiB ITCM and 4KiB DTCM. 42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM. 45 TCMs in two separate banks, so for example an 8KiB ITCM is divided 46 into two 4KiB banks with its own control registers. The idea is to
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/linux-5.10/drivers/mtd/spi-nor/ |
D | Kconfig | 19 to erasing whole blocks (32/64 KiB). 22 64 KiB block instead of 16 × 4 KiB sectors. 25 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
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/linux-5.10/Documentation/admin-guide/device-mapper/ |
D | dm-ebs.rst | 36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB. 47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at 48 offset 128 sectors, enforce 2KiB underlying device block size. 49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
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/linux-5.10/arch/arm/boot/dts/ |
D | lpc4350.dtsi | 26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */ 31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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D | lpc4357.dtsi | 26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */ 31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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D | armada-385-linksys-rango.dts | 97 reg = <0x200000 0x20000>; /* 128KiB */ 102 reg = <0x220000 0x40000>; /* 256KiB */ 107 reg = <0x7e0000 0x40000>; /* 256KiB */ 113 reg = <0x820000 0x1e0000>; /* 1920KiB */
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D | omap3-overo-base.dtsi | 254 reg = <0 0x80000>; /* 512KiB */ 258 reg = <0x80000 0x1C0000>; /* 1792KiB */ 262 reg = <0x240000 0x40000>; /* 256KiB */ 266 reg = <0x280000 0x800000>; /* 8192KiB */
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/linux-5.10/Documentation/ABI/stable/ |
D | sysfs-devices-system-xen_memory | 54 As target above, except the value is in KiB. 61 Current size (in KiB) of this domain's memory 69 Amount (in KiB) of high memory in the balloon. 76 Amount (in KiB) of low (or normal) memory in the
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/linux-5.10/tools/perf/arch/x86/util/ |
D | intel-bts.c | 28 #define KiB(x) ((x) * 1024) macro 30 #define KiB_MASK(x) (KiB(x) - 1) 156 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 158 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 162 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 193 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 195 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 205 min_sz = KiB(4); in intel_bts_recording_options() 207 min_sz = KiB(8); in intel_bts_recording_options()
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/linux-5.10/drivers/mtd/tests/ |
D | speedtest.c | 260 pr_info("eraseblock write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 278 pr_info("eraseblock read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 300 pr_info("page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 318 pr_info("page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 340 pr_info("2 page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 358 pr_info("2 page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 368 pr_info("erase speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 396 pr_info("%dx multi-block erase speed is %ld KiB/s\n", in mtd_speedtest_init()
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/linux-5.10/drivers/mtd/nand/onenand/ |
D | Kconfig | 61 of 4KiB. Plane1 has only even blocks such as block0, block2, block4 63 So MTD regards it as 4KiB page size and 256KiB block size
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/linux-5.10/tools/perf/arch/arm64/util/ |
D | arm-spe.c | 26 #define KiB(x) ((x) * 1024) macro 98 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_recording_options() 100 opts->mmap_pages = KiB(256) / page_size; in arm_spe_recording_options() 107 size_t min_sz = KiB(8); in arm_spe_recording_options()
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/linux-5.10/Documentation/arm/samsung-s3c24xx/ |
D | nand.rst | 18 The driver is capable of handling NAND flash with a 2KiB page 22 each 256 byte block in an 2KiB page. This means that more than
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/linux-5.10/drivers/mtd/maps/ |
D | netsc520.c | 24 ** partitions. The first partition is 768 KiB and is intended to 26 ** partition is 256 KiB and holds the BIOS image. The third 28 ** image. The last partition is 512 KiB and contains another copy
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/linux-5.10/include/linux/mtd/ |
D | spi-nor.h | 42 #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ 43 #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ 44 #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ 46 #define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */ 69 #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ 70 #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ 71 #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
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/linux-5.10/fs/jffs2/ |
D | build.c | 352 dbg_fsbuild("trigger levels (size %d KiB, block size %d KiB, %d blocks)\n", in jffs2_calc_trigger_levels() 354 dbg_fsbuild("Blocks required to allow deletion: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 356 dbg_fsbuild("Blocks required to allow writes: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 358 dbg_fsbuild("Blocks required to quiesce GC thread: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 360 dbg_fsbuild("Blocks required to allow GC merges: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 362 dbg_fsbuild("Blocks required to GC bad blocks: %d (%d KiB)\n", in jffs2_calc_trigger_levels()
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/linux-5.10/Documentation/filesystems/nfs/ |
D | rpc-server-gss.rst | 55 A) It can handle tokens that are no bigger than 2KiB 58 beyond 64KiB in size due to various authorization extensions attacked to 65 back to the kernel (4KiB).
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/linux-5.10/arch/arm/mach-cns3xxx/ |
D | core.c | 56 .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ 71 .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ 292 /* 32 KiB, 8-way, parity disable */ in cns3xxx_l2x0_init()
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/linux-5.10/Documentation/admin-guide/ |
D | perf-security.rst | 234 is set to 516 KiB, then a user process is provided with 516 KiB * 8 = 235 4128 KiB of memory above the RLIMIT_MEMLOCK limit (ulimit -l) for 238 required to manually distribute the available 4128 KiB between the 241 allocates all available 4128 KiB and the other processes will fail to
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/linux-5.10/lib/ |
D | decompress_unxz.c | 53 * may be up to 64 KiB of actual payload in the chunk. Often the payload is 55 * chunk has only 32 KiB of payload. 75 * - 8 bytes per every 32 KiB of uncompressed size (one LZMA2 chunk header 76 * per chunk, each chunk having average payload size of 32 KiB); and 77 * - 64 KiB (biggest possible LZMA2 chunk payload size) to make sure that
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/linux-5.10/include/linux/ |
D | xz.h | 159 * In the kernel, dictionary sizes of 64 KiB, 128 KiB, 256 KiB, 160 * 512 KiB, and 1 MiB are probably the only reasonable values,
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