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/qemu/include/standard-headers/linux/
H A Dvirtio_pci.h127 uint8_t cfg_type; /* Identifies the structure. */
140 uint8_t cfg_type; /* Identifies the structure. */
141 uint16_t vendor_id; /* Identifies the vendor-specific format. */
/qemu/backends/
H A Ddbus-vmstate1.xml14 A string that identifies the helper uniquely. (maximum 256 bytes
/qemu/docs/system/s390x/
H A Dpcidevices.rst30 identifier, and ``fid`` identifies the physical slot, i.e.::
H A Dvfio-ap.rst82 * The AP Mask (APM) field is a bit mask that identifies the AP adapters assigned
92 * The AP Domain Mask field is a bit mask that identifies the AP control domains
227 The ``apmask`` is a 256-bit mask that identifies a set of AP adapter IDs
234 The ``aqmask`` is a 256-bit mask that identifies a set of AP queue indexes
271 above identifies device numbers 1 and 7 (``01000001``).
/qemu/util/
H A Did.c46 * - SUBSYSTEM identifies the subsystem creating the ID
/qemu/docs/interop/
H A Dfirmware.json310 # @executable: Identifies the firmware executable. The @mode
322 # @nvram-template: Identifies the NVRAM template compatible with
354 # @filename: Identifies the firmware executable. The firmware executable
370 # @filename: Identifies the firmware executable. The firmware executable
H A Dqmp-spec.rst109 - The ``execute`` or ``exec-oob`` member identifies the command to be
/qemu/qapi/
H A Dauthz.json109 # @identity: Identifies the allowed user. Its format depends on the
H A Dnet.json408 # are non-negative integers. XXX identifies a switch and YYY
409 # identifies a port of the switch. VALE ports having the same XXX
H A Dcrypto.json466 # @serial: serial number that identifies a key to get from the kernel
H A Dcxl.json117 # @nibble-mask: Identifies one or more nibbles that the error affects
/qemu/include/hw/intc/
H A Darm_gic_common.h134 /* This is just so we can have an opaque pointer which identifies
/qemu/docs/specs/
H A Dacpi_erst.rst107 Slot 0 contains a backend storage header that identifies the contents
H A Dppc-spapr-hotplug.rst426 identifies the dynamic reconfiguration capabilities of the guest. It consists
/qemu/hw/uefi/
H A Dvar-service-pkcs7.c66 * identifies them as pkcs7 signatures. openssl and gnutls will not parse them
/qemu/docs/devel/testing/
H A Dfuzzing.rst241 - From the crash output, obtain some string that identifies the crash. This
/qemu/hw/intc/
H A Dpnv_xive2_regs.h131 * Identifies which of the 32 possible core chiplets are enabled and
H A Dpnv_xive.c1286 case CQ_MSGSND: /* Identifies which cores have msgsnd enabled. */ in pnv_xive_ic_reg_read()
2067 /* The PnvChip id identifies the XIVE interrupt controller. */
/qemu/docs/
H A Dqdev-device-use.txt85 where DEVNAME is either ide-hd or ide-cd, IDE-BUS identifies an IDE
/qemu/scripts/
H A Ddump-guest-memory.py475 FILE identifies the target file to write the guest vmcore to.
/qemu/hw/xen/
H A Dxen_pt_msi.c121 /* this probably identifies an misconfiguration of the guest, in msi_msix_setup()
/qemu/target/ppc/
H A Dgdbstub.c316 * GDB identifies registers based on the order they are in gdb_gen_spr_feature()
/qemu/include/hw/xtensa/
H A Dxtensa-isa.h109 * identifies the number of slots, and then decoding each slot
/qemu/rust/hw/char/pl011/src/
H A Ddevice.rs139 /// The byte string that identifies the device.
/qemu/include/hw/
H A Dboards.h268 const char *family; /* NULL iff @name identifies a standalone machtype */

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