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/linux-6.15/Documentation/devicetree/bindings/mailbox/
Dmicrochip,sbi-ipc.yaml23 Inter-hart Communication (IHC) IP.
29 const: microchip,miv-ihc-rtl-v2
55 For "microchip,miv-ihc-rtl-v2", the cell represents the physical
59 microchip,ihc-chan-disabled-mask:
61 Represents the enable/disable state of the bi-directional IHC
62 channels within the MIV-IHC IP configuration.
97 microchip,ihc-chan-disabled-mask: false
101 - microchip,ihc-chan-disabled-mask
116 compatible = "microchip,miv-ihc-rtl-v2";
117 microchip,ihc-chan-disabled-mask = /bits/ 16 <0>;
/linux-6.15/arch/riscv/boot/dts/microchip/
Dmpfs-tysom-m-fabric.dtsi4 // #include "dt-bindings/mailbox/miv-ihc.h"
/linux-6.15/drivers/mailbox/
Dmailbox-mchp-ipc-sbi.c192 dev_err_ratelimited(ipc->dev, "could not get IHC irq status ret=%d\n", ret); in mchp_ipc_cluster_aggr_isr()
199 * Iterate over each bit set in the IHC interrupt status register (IRQ_STATUS) to identify in mchp_ipc_cluster_aggr_isr()
391 "miv-ihc-irq", ipc); in mchp_ipc_get_cluster_aggr_irq()
/linux-6.15/drivers/gpu/drm/amd/include/
Dsoc24_enum.h5136 * IHC Enums
Dsoc21_enum.h5118 * IHC Enums
Dnavi10_enum.h4891 * IHC Enums