Searched full:hs200 (Results 1 – 25 of 126) sorted by relevance
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| /linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.txt | 40 - mediatek,hs200-cmd-int-delay: HS200 command internal delay setting.
72 mediatek,hs200-cmd-int-delay = <26>;
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| D | cdns,sdhci.yaml | 93 HS200, HS400 and HS400_ES.
100 Value of the delay introduced on the sdclk output for HS200, HS400 and
131 mmc-hs200-1_8v;
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| D | sdhci-sprd.txt | 39 - sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
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| D | sdhci-am654.yaml | 105 ti,otap-del-sel-hs200:
106 description: Output tap delay for eMMC HS200 timing
212 ti,otap-del-sel-hs200 = <0x5>;
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| D | mmc-controller.yaml | 196 mmc-hs200-1_2v:
199 eMMC HS200 mode (1.2V I/O) is supported.
201 mmc-hs200-1_8v:
204 eMMC HS200 mode (1.8V I/O) is supported.
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| D | hi3798cv200-dw-mshc.txt | 37 mmc-hs200-1_8v;
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| D | brcm,sdhci-brcmstb.txt | 38 mmc-hs200-1_8v;
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| D | amlogic,meson-mx-sdhc.yaml | 18 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
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| /linux-5.10/drivers/mmc/host/ |
| D | sdhci-acpi.c | 570 * HS->HS200->Perform Tuning->HS->HS400
573 * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
575 * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
577 * If we have previously performed tuning and switch back to HS200 or
673 * b) The HS200 and HS400 driver strengths don't match. in sdhci_acpi_emmc_amd_probe_slot()
676 * strength of B. As part of initializing HS400, HS200 tuning in sdhci_acpi_emmc_amd_probe_slot()
682 * SDR25 => 25 MHz, SDR50 => 50 MHz. Additionally the HS200 and in sdhci_acpi_emmc_amd_probe_slot()
694 * Since HS400 and HS200 presets must be identical, we could in sdhci_acpi_emmc_amd_probe_slot()
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| D | sdhci-xenon.c | 187 * Xenon defines different values for HS200 and HS400
278 * HS400/HS200/eMMC HS doesn't have Preset Value register. in xenon_set_ios()
279 * However, sdhci_set_ios will read HS400/HS200 Preset register. in xenon_set_ios()
280 * Disable Preset Value register for HS400/HS200. in xenon_set_ios()
420 /* Disable HS200 on Armada AP806 */ in xenon_probe_dt()
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| D | dw_mmc-k3.c | 86 {0}, /* 9: HS200 */
98 {0}, /* 9: HS200 */
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| /linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-tinker-s.dts | 22 mmc-hs200-1_8v;
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| D | exynos5260-xyref5260.dts | 69 supports-hs200-mode; /* 200 MHz */
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| /linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | msm8992-msft-lumia-talkman.dts | 38 mmc-hs200-1_8v;
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| D | sdm630-sony-xperia-nile.dtsi | 108 /* SoMC Nile platform's eMMC doesn't support HS200 mode */
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| /linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a-rdb.dts | 30 mmc-hs200-1_8v;
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| D | fsl-ls1088a-rdb.dts | 86 mmc-hs200-1_8v;
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| D | fsl-lx2160a-cex7.dtsi | 47 mmc-hs200-1_8v;
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| D | fsl-lx2160a-rdb.dts | 75 mmc-hs200-1_8v;
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| D | fsl-ls208xa-qds.dtsi | 13 mmc-hs200-1_8v;
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| /linux-5.10/arch/arm64/boot/dts/sprd/ |
| D | whale2.dtsi | 147 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
158 mmc-hs200-1_8v;
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| /linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3368-orion-r68-meta.dts | 165 mmc-hs200-1_2v;
166 mmc-hs200-1_8v;
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| /linux-5.10/drivers/mmc/core/ |
| D | mmc.c | 1166 pr_err("%s: switch to high-speed from hs200 failed, err:%d\n", in mmc_select_hs400()
1278 /* Switch HS to HS200 */ in mmc_hs400_to_hs200()
1290 * For HS200, CRC errors are not a reliable way to know the switch in mmc_hs400_to_hs200()
1429 * For device supporting HS200 mode, the following sequence
1432 * 2. switch to HS200 mode
1457 * switch to HS200 mode if bus width is set successfully. in mmc_select_hs200()
1473 * For HS200, CRC errors are not a reliable way to know the in mmc_select_hs200()
1499 * Activate High Speed, HS200 or HS400ES mode if supported.
1529 * conditions for HS200 and HS400, which sends CMD21 to the device.
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| /linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-hwacom-amazetv.dts | 153 mmc-hs200-1_8v;
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| /linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hi3798cv200-poplar.dts | 87 mmc-hs200-1_8v;
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