| /linux-6.15/drivers/gpu/drm/sun4i/ |
| D | sun4i_hdmi_i2c.c | 25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) in fifo_transfer() argument
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
59 ioread8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 iowrite8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
64 regmap_field_force_write(hdmi->field_ddc_int_status, in fifo_transfer()
70 static int xfer_msg(struct sun4i_hdmi *hdmi, struct i2c_msg *msg) in xfer_msg() argument
76 if (hdmi->variant->ddc_fifo_has_dir) { in xfer_msg()
77 reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
82 writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
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| D | sun4i_hdmi_enc.c | 47 struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_write_infoframe() local
57 writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i)); in sun4i_hdmi_write_infoframe()
66 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_disable() local
69 DRM_DEBUG_DRIVER("Disabling the HDMI Output\n"); in sun4i_hdmi_disable()
71 val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
73 writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
75 clk_disable_unprepare(hdmi->tmds_clk); in sun4i_hdmi_disable()
82 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_enable() local
83 struct drm_connector *connector = &hdmi->connector; in sun4i_hdmi_enable()
87 unsigned long long tmds_rate = conn_state->hdmi.tmds_char_rate; in sun4i_hdmi_enable()
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| D | sun8i_dw_hdmi.c | 22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); in sun8i_dw_hdmi_encoder_mode_set() local
24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); in sun8i_dw_hdmi_encoder_mode_set()
33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_a83t() argument
44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_h6() argument
104 struct sun8i_dw_hdmi *hdmi; in sun8i_dw_hdmi_bind() local
110 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in sun8i_dw_hdmi_bind()
111 if (!hdmi) in sun8i_dw_hdmi_bind()
114 plat_data = &hdmi->plat_data; in sun8i_dw_hdmi_bind()
115 hdmi->dev = &pdev->dev; in sun8i_dw_hdmi_bind()
116 encoder = &hdmi->encoder; in sun8i_dw_hdmi_bind()
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| /linux-6.15/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi.c | 3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
12 #include <linux/hdmi.h>
39 #include "dw-hdmi-audio.h"
40 #include "dw-hdmi-cec.h"
41 #include "dw-hdmi.h"
48 /* DW-HDMI Controller >= 0x200a are at least compliant with SCDC version 1 */
126 int (*configure)(struct dw_hdmi *hdmi,
189 void (*enable_audio)(struct dw_hdmi *hdmi);
190 void (*disable_audio)(struct dw_hdmi *hdmi);
208 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) in hdmi_writeb() argument
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| D | dw-hdmi-qp.c | 10 #include <linux/hdmi.h>
28 #include <sound/hdmi-codec.h>
30 #include "dw-hdmi-qp.h"
45 * the recommended N values specified in the Audio chapter of the HDMI
92 /* For 297 MHz+ HDMI spec have some other rule for setting N */
101 * These are the CTS values as recommended in the Audio chapter of the HDMI
149 static void dw_hdmi_qp_write(struct dw_hdmi_qp *hdmi, unsigned int val, in dw_hdmi_qp_write() argument
152 regmap_write(hdmi->regm, offset, val); in dw_hdmi_qp_write()
155 static unsigned int dw_hdmi_qp_read(struct dw_hdmi_qp *hdmi, int offset) in dw_hdmi_qp_read() argument
159 regmap_read(hdmi->regm, offset, &val); in dw_hdmi_qp_read()
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| /linux-6.15/drivers/gpu/drm/rockchip/ |
| D | rk3066_hdmi.c | 72 static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset) in hdmi_readb() argument
74 return readl_relaxed(hdmi->regs + offset); in hdmi_readb()
77 static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val) in hdmi_writeb() argument
79 writel_relaxed(val, hdmi->regs + offset); in hdmi_writeb()
82 static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset, in hdmi_modb() argument
85 u8 temp = hdmi_readb(hdmi, offset) & ~msk; in hdmi_modb()
88 hdmi_writeb(hdmi, offset, temp); in hdmi_modb()
91 static void rk3066_hdmi_i2c_init(struct rk3066_hdmi *hdmi) in rk3066_hdmi_i2c_init() argument
95 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE; in rk3066_hdmi_i2c_init()
97 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF); in rk3066_hdmi_i2c_init()
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| D | inno_hdmi.c | 12 #include <linux/hdmi.h>
145 static int inno_hdmi_find_phy_config(struct inno_hdmi *hdmi, in inno_hdmi_find_phy_config() argument
149 hdmi->variant->phy_configs; in inno_hdmi_find_phy_config()
157 DRM_DEV_DEBUG(hdmi->dev, "No phy configuration for pixelclock %lu\n", in inno_hdmi_find_phy_config()
163 static inline u8 hdmi_readb(struct inno_hdmi *hdmi, u16 offset) in hdmi_readb() argument
165 return readl_relaxed(hdmi->regs + (offset) * 0x04); in hdmi_readb()
168 static inline void hdmi_writeb(struct inno_hdmi *hdmi, u16 offset, u32 val) in hdmi_writeb() argument
170 writel_relaxed(val, hdmi->regs + (offset) * 0x04); in hdmi_writeb()
173 static inline void hdmi_modb(struct inno_hdmi *hdmi, u16 offset, in hdmi_modb() argument
176 u8 temp = hdmi_readb(hdmi, offset) & ~msk; in hdmi_modb()
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| D | dw_hdmi_qp-rockchip.c | 92 struct dw_hdmi_qp *hdmi; member
101 void (*io_init)(struct rockchip_hdmi_qp *hdmi);
115 struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder); in dw_hdmi_qp_rockchip_encoder_enable() local
120 gpiod_set_value(hdmi->enable_gpio, 1); in dw_hdmi_qp_rockchip_encoder_enable()
132 phy_set_bus_width(hdmi->phy, div_u64(rate, 100)); in dw_hdmi_qp_rockchip_encoder_enable()
157 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_init() local
159 return phy_power_on(hdmi->phy); in dw_hdmi_qp_rk3588_phy_init()
165 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_disable() local
167 phy_power_off(hdmi->phy); in dw_hdmi_qp_rk3588_phy_disable()
173 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_read_hpd() local
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| D | dw_hdmi-rockchip.c | 38 /* need to be unset if hdmi or i2c should control voltage */
62 * @lcdsel_big: reg value of selecting vop big for HDMI
63 * @lcdsel_lit: reg value of selecting vop little for HDMI
82 struct dw_hdmi *hdmi; member
199 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) in rockchip_hdmi_parse_dt() argument
201 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
204 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
205 if (IS_ERR(hdmi->regmap)) { in rockchip_hdmi_parse_dt()
206 dev_err(hdmi->dev, "Unable to get rockchip,grf\n"); in rockchip_hdmi_parse_dt()
207 return PTR_ERR(hdmi->regmap); in rockchip_hdmi_parse_dt()
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| /linux-6.15/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi4.c | 3 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
10 #define DSS_SUBSYS_NAME "HDMI"
27 #include <sound/omap-hdmi-audio.h>
38 #include "hdmi.h"
40 static int hdmi_runtime_get(struct omap_hdmi *hdmi) in hdmi_runtime_get() argument
46 r = pm_runtime_get_sync(&hdmi->pdev->dev); in hdmi_runtime_get()
48 pm_runtime_put_noidle(&hdmi->pdev->dev); in hdmi_runtime_get()
54 static void hdmi_runtime_put(struct omap_hdmi *hdmi) in hdmi_runtime_put() argument
60 r = pm_runtime_put_sync(&hdmi->pdev->dev); in hdmi_runtime_put()
66 struct omap_hdmi *hdmi = data; in hdmi_irq_handler() local
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| D | hdmi5.c | 3 * HDMI driver for OMAP5
14 #define DSS_SUBSYS_NAME "HDMI"
31 #include <sound/omap-hdmi-audio.h>
41 static int hdmi_runtime_get(struct omap_hdmi *hdmi) in hdmi_runtime_get() argument
47 r = pm_runtime_get_sync(&hdmi->pdev->dev); in hdmi_runtime_get()
49 pm_runtime_put_noidle(&hdmi->pdev->dev); in hdmi_runtime_get()
55 static void hdmi_runtime_put(struct omap_hdmi *hdmi) in hdmi_runtime_put() argument
61 r = pm_runtime_put_sync(&hdmi->pdev->dev); in hdmi_runtime_put()
67 struct omap_hdmi *hdmi = data; in hdmi_irq_handler() local
68 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler()
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| /linux-6.15/drivers/gpu/drm/mediatek/ |
| D | mtk_hdmi.c | 10 #include <linux/hdmi.h>
24 #include <sound/hdmi-codec.h>
184 static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) in mtk_hdmi_read() argument
186 return readl(hdmi->regs + offset); in mtk_hdmi_read()
189 static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) in mtk_hdmi_write() argument
191 writel(val, hdmi->regs + offset); in mtk_hdmi_write()
194 static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) in mtk_hdmi_clear_bits() argument
196 void __iomem *reg = hdmi->regs + offset; in mtk_hdmi_clear_bits()
204 static void mtk_hdmi_set_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) in mtk_hdmi_set_bits() argument
206 void __iomem *reg = hdmi->regs + offset; in mtk_hdmi_set_bits()
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| /linux-6.15/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi.c | 17 #include "hdmi.h"
19 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument
24 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
27 if (!hdmi->connector->display_info.is_hdmi) { in msm_hdmi_set_mode()
29 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
38 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
39 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
40 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
46 struct hdmi *hdmi = dev_id; in msm_hdmi_irq() local
49 msm_hdmi_hpd_irq(hdmi->bridge); in msm_hdmi_irq()
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| D | hdmi_bridge.c | 14 #include "hdmi.h"
20 struct hdmi *hdmi = hdmi_bridge->hdmi; in msm_hdmi_power_on() local
21 const struct hdmi_platform_config *config = hdmi->config; in msm_hdmi_power_on()
24 pm_runtime_get_sync(&hdmi->pdev->dev); in msm_hdmi_power_on()
26 ret = regulator_bulk_enable(config->pwr_reg_cnt, hdmi->pwr_regs); in msm_hdmi_power_on()
31 DBG("pixclock: %lu", hdmi->pixclock); in msm_hdmi_power_on()
32 ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock); in msm_hdmi_power_on()
40 ret = clk_prepare_enable(hdmi->pwr_clks[i]); in msm_hdmi_power_on()
52 struct hdmi *hdmi = hdmi_bridge->hdmi; in power_off() local
53 const struct hdmi_platform_config *config = hdmi->config; in power_off()
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| D | hdmi_hpd.c | 12 #include "hdmi.h"
14 static void msm_hdmi_phy_reset(struct hdmi *hdmi) in msm_hdmi_phy_reset() argument
18 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in msm_hdmi_phy_reset()
22 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
26 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
32 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
36 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
44 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
48 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
54 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
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| D | hdmi_hdcp.c | 5 #include "hdmi.h"
21 /* QFPROM Registers for HDMI/HDCP */
49 struct hdmi *hdmi; member
78 static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_read() argument
99 rc = i2c_transfer(hdmi->i2c, msgs, 2); in msm_hdmi_ddc_read()
116 static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_write() argument
141 rc = i2c_transfer(hdmi->i2c, msgs, 1); in msm_hdmi_ddc_write()
159 struct hdmi *hdmi = hdcp_ctrl->hdmi; in msm_hdmi_hdcp_scm_wr() local
167 phy_addr = (u32)hdmi->mmio_phy_addr; in msm_hdmi_hdcp_scm_wr()
190 hdmi_write(hdmi, preg[i], pdata[i]); in msm_hdmi_hdcp_scm_wr()
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| D | hdmi_i2c.c | 7 #include "hdmi.h"
11 struct hdmi *hdmi; member
19 struct hdmi *hdmi = hdmi_i2c->hdmi; in init_ddc() local
21 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, in init_ddc()
23 hdmi_write(hdmi, REG_HDMI_DDC_CTRL, in init_ddc()
26 hdmi_write(hdmi, REG_HDMI_DDC_SPEED, in init_ddc()
30 hdmi_write(hdmi, REG_HDMI_DDC_SETUP, in init_ddc()
34 hdmi_write(hdmi, REG_HDMI_DDC_REF, in init_ddc()
41 struct hdmi *hdmi = hdmi_i2c->hdmi; in ddc_clear_irq() local
42 struct drm_device *dev = hdmi->dev; in ddc_clear_irq()
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| D | hdmi.h | 15 #include <linux/hdmi.h>
20 #include "hdmi.xml.h"
33 struct hdmi { struct
66 /* the encoder we are hooked to (outside of hdmi block) */ argument
106 struct hdmi *hdmi; member
111 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on);
113 static inline void hdmi_write(struct hdmi *hdmi, u32 reg, u32 data) in hdmi_write() argument
115 writel(data, hdmi->mmio + reg); in hdmi_write()
118 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) in hdmi_read() argument
120 return readl(hdmi->mmio + reg); in hdmi_read()
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| D | hdmi_audio.c | 9 #include <linux/hdmi.h>
11 #include <sound/hdmi-codec.h>
13 #include "hdmi.h"
15 /* Supported HDMI Audio sample rates */
76 int msm_hdmi_audio_update(struct hdmi *hdmi) in msm_hdmi_audio_update() argument
78 struct hdmi_audio *audio = &hdmi->audio; in msm_hdmi_audio_update()
84 if (!hdmi->connector->display_info.is_hdmi) in msm_hdmi_audio_update()
90 DBG("video: power_on=%d, pixclock=%lu", hdmi->power_on, hdmi->pixclock); in msm_hdmi_audio_update()
92 if (enabled && !(hdmi->power_on && hdmi->pixclock)) { in msm_hdmi_audio_update()
98 arcs = get_arcs(hdmi->pixclock); in msm_hdmi_audio_update()
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| /linux-6.15/drivers/gpu/drm/tegra/ |
| D | hdmi.c | 10 #include <linux/hdmi.h>
21 #include <sound/hdmi-codec.h>
35 #include "hdmi.h"
68 struct regulator *hdmi; member
114 static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi, in tegra_hdmi_readl() argument
117 u32 value = readl(hdmi->regs + (offset << 2)); in tegra_hdmi_readl()
119 trace_hdmi_readl(hdmi->dev, offset, value); in tegra_hdmi_readl()
124 static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value, in tegra_hdmi_writel() argument
127 trace_hdmi_writel(hdmi->dev, offset, value); in tegra_hdmi_writel()
128 writel(value, hdmi->regs + (offset << 2)); in tegra_hdmi_writel()
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| /linux-6.15/drivers/gpu/drm/sti/ |
| D | sti_hdmi.c | 10 #include <linux/hdmi.h>
26 #include <sound/hdmi-codec.h>
164 struct sti_hdmi *hdmi; member
177 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) in hdmi_read() argument
179 return readl(hdmi->regs + offset); in hdmi_read()
182 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) in hdmi_write() argument
184 writel(val, hdmi->regs + offset); in hdmi_write()
188 * HDMI interrupt handler threaded
195 struct sti_hdmi *hdmi = arg; in hdmi_irq_thread() local
198 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) { in hdmi_irq_thread()
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| /linux-6.15/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi5.c | 3 * HDMI driver for OMAP5
14 #define DSS_SUBSYS_NAME "HDMI"
32 #include <sound/omap-hdmi-audio.h>
38 static struct omap_hdmi hdmi; variable
46 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
59 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
88 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
91 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
98 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
113 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
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| D | hdmi4.c | 3 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
9 #define DSS_SUBSYS_NAME "HDMI"
27 #include <sound/omap-hdmi-audio.h>
32 #include "hdmi.h"
34 static struct omap_hdmi hdmi; variable
42 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
55 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
94 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
97 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); in hdmi_init_regulator()
105 hdmi.vdda_reg = reg; in hdmi_init_regulator()
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| /linux-6.15/drivers/media/i2c/adv748x/ |
| D | adv748x-hdmi.c | 3 * Driver for Analog Devices ADV748X HDMI receiver and Component Processor (CP)
21 * HDMI and CP
90 static void adv748x_hdmi_fill_format(struct adv748x_hdmi *hdmi, in adv748x_hdmi_fill_format() argument
96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format()
102 fmt->width = hdmi->timings.bt.width; in adv748x_hdmi_fill_format()
103 fmt->height = hdmi->timings.bt.height; in adv748x_hdmi_fill_format()
145 * HDMI CP uses a Data Enable synchronisation timing reference
220 struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd); in adv748x_hdmi_s_dv_timings() local
221 struct adv748x_state *state = adv748x_hdmi_to_state(hdmi); in adv748x_hdmi_s_dv_timings()
227 if (v4l2_match_dv_timings(&hdmi->timings, timings, 0, false)) in adv748x_hdmi_s_dv_timings()
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| /linux-6.15/Documentation/devicetree/bindings/display/samsung/ |
| D | samsung,exynos-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
7 title: Samsung Exynos SoC HDMI
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
20 - samsung,exynos5420-hdmi
21 - samsung,exynos5433-hdmi
34 Phandle to the HDMI DDC node.
36 hdmi-en-supply:
38 Provides voltage source for DCC lines available on HDMI connector. When
40 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
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