| /linux-5.10/arch/riscv/boot/dts/sifive/ ! |
| D | fu540-c000.dtsi | 6 #include <dt-bindings/clock/sifive-fu540-prci.h>
11 compatible = "sifive,fu540-c000", "sifive,fu540";
140 compatible = "sifive,fu540-c000", "sifive,fu540", "simple-bus";
156 compatible = "sifive,fu540-c000-prci";
162 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
170 compatible = "sifive,fu540-c000-pdma";
177 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
185 compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
197 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
208 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
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| D | hifive-unleashed-a00.dts | 4 #include "fu540-c000.dtsi"
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
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| /linux-5.10/Documentation/devicetree/bindings/clock/sifive/ ! |
| D | fu540-prci.yaml | 5 $id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
8 title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
15 On the FU540 family of SoCs, most system-wide clock and reset integration
18 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
27 const: sifive,fu540-c000-prci
56 compatible = "sifive,fu540-c000-prci";
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| /linux-5.10/Documentation/devicetree/bindings/pwm/ ! |
| D | pwm-sifive.yaml | 28 - const: sifive,fu540-c000-pwm
32 compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0
33 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
49 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
63 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
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| /linux-5.10/Documentation/devicetree/bindings/dma/ ! |
| D | sifive,fu540-c000-pdma.yaml | 4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf
28 - const: sifive,fu540-c000-pdma
51 compatible = "sifive,fu540-c000-pdma";
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| /linux-5.10/Documentation/devicetree/bindings/timer/ ! |
| D | sifive,clint.yaml | 26 - const: sifive,fu540-c000-clint
32 "sifive,fu540-c000-clint" for the SiFive CLINT v0 as integrated
33 onto the SiFive FU540 chip, and "sifive,clint0" for the SiFive
53 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
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| /linux-5.10/drivers/clk/sifive/ ! |
| D | Kconfig | 12 bool "PRCI driver for SiFive FU540 SoCs"
16 FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC,
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| D | fu540-prci.c | 16 * The FU540 PRCI implements clock and reset control for the SiFive
17 * FU540-C000 chip. This driver assumes that it has sole control
24 * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
27 #include <dt-bindings/clock/sifive-fu540-prci.h>
225 * Given a value @r read from an FU540 PRCI PLL configuration register,
607 dev_dbg(dev, "SiFive FU540 PRCI probed\n"); in sifive_fu540_prci_probe()
613 { .compatible = "sifive,fu540-c000-prci", },
620 .name = "sifive-fu540-prci",
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| D | Makefile | 2 obj-$(CONFIG_CLK_SIFIVE_FU540_PRCI) += fu540-prci.o
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| /linux-5.10/Documentation/devicetree/bindings/spi/ ! |
| D | spi-sifive.yaml | 20 - const: sifive,fu540-c000-spi
26 "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
27 onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
74 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
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| /linux-5.10/Documentation/devicetree/bindings/serial/ ! |
| D | sifive-serial.yaml | 20 - const: sifive,fu540-c000-uart
53 #include <dt-bindings/clock/sifive-fu540-prci.h>
55 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
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| /linux-5.10/Documentation/devicetree/bindings/gpio/ ! |
| D | sifive,gpio.yaml | 16 - const: sifive,fu540-c000-gpio
55 #include <dt-bindings/clock/sifive-fu540-prci.h>
57 compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
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| /linux-5.10/Documentation/devicetree/bindings/riscv/ ! |
| D | sifive-l2-cache.yaml | 29 - sifive,fu540-c000-ccache
37 - const: sifive,fu540-c000-ccache
85 compatible = "sifive,fu540-c000-ccache", "cache";
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| D | sifive.yaml | 23 - const: sifive,fu540-c000
24 - const: sifive,fu540
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| /linux-5.10/Documentation/devicetree/bindings/net/ ! |
| D | macb.txt | 18 Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC.
21 For "sifive,fu540-c000-gem", second range is required to specify the
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| /linux-5.10/drivers/dma/sf-pdma/ ! |
| D | sf-pdma.h | 3 * SiFive FU540 Platform DMA driver
13 * SiFive FU540-C000 v1.0
14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
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| D | sf-pdma.c | 3 * SiFive FU540 Platform DMA driver
13 * SiFive FU540-C000 v1.0
14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
577 { .compatible = "sifive,fu540-c000-pdma" },
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| /linux-5.10/Documentation/devicetree/bindings/sifive/ ! |
| D | sifive-blocks-ip-versioning.txt | 30 "sifive,fu540-c000-uart". This way, if SoC-specific
38 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
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| /linux-5.10/Documentation/devicetree/bindings/i2c/ ! |
| D | i2c-ocores.txt | 6 "sifive,fu540-c000-i2c", "sifive,i2c0"
8 FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt
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| /linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ ! |
| D | sifive,plic-1.0.0.yaml | 45 - const: sifive,fu540-c000-plic
87 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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| D | riscv,cpu-intc.txt | 49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
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| /linux-5.10/drivers/clk/analogbits/ ! |
| D | wrpll-cln28hpc.c | 20 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
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| /linux-5.10/drivers/i2c/busses/ ! |
| D | i2c-ocores.c | 88 #define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */
478 .compatible = "sifive,fu540-c000-i2c",
695 * FU540-C000 SoC in polling mode. in ocores_i2c_probe()
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| /linux-5.10/drivers/soc/sifive/ ! |
| D | sifive_l2_cache.c | 95 { .compatible = "sifive,fu540-c000-ccache" },
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| /linux-5.10/drivers/gpio/ ! |
| D | gpio-sifive.c | 241 { .compatible = "sifive,fu540-c000-gpio" },
|