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/linux-6.8/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,ethdr.yaml4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ethdr.yaml#
7 title: MediaTek Ethdr Device
14 ETHDR (ET High Dynamic Range) is a MediaTek internal HDR engine and is
20 one video backend and a mixer. ETHDR has two DMA function blocks, DS and ADL.
27 - const: mediatek,mt8195-disp-ethdr
29 - const: mediatek,mt8188-disp-ethdr
30 - const: mediatek,mt8195-disp-ethdr
66 - description: ethdr top clock
139 compatible = "mediatek,mt8195-disp-ethdr";
Dmediatek,padding.yaml16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
/linux-6.8/drivers/gpu/drm/mediatek/
Dmtk_disp_ovl_adaptor.c67 [OVL_ADAPTOR_TYPE_ETHDR] = "ethdr",
72 static const struct mtk_ddp_comp_funcs ethdr = { variable
92 [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, DDP_COMPONENT_ETHDR_MIXER, 0, &ethdr },
117 struct device *ethdr; in mtk_ovl_adaptor_layer_config() local
133 ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; in mtk_ovl_adaptor_layer_config()
139 mtk_ethdr_layer_config(ethdr, idx, state, cmdq_pkt); in mtk_ovl_adaptor_layer_config()
143 /* ETHDR is in 1T2P domain, width needs to be 2 pixels align */ in mtk_ovl_adaptor_layer_config()
181 mtk_ethdr_layer_config(ethdr, idx, state, cmdq_pkt); in mtk_ovl_adaptor_layer_config()
440 { .compatible = "mediatek,mt8195-disp-ethdr", .data = (void *)OVL_ADAPTOR_TYPE_ETHDR },
Dmtk_ethdr.c336 dev_err_probe(dev, PTR_ERR(priv->reset_ctl), "cannot get ethdr reset control\n"); in mtk_ethdr_probe()
355 { .compatible = "mediatek,mt8195-disp-ethdr"},
365 .name = "mediatek-disp-ethdr",
/linux-6.8/drivers/soc/mediatek/
Dmtk-mmsys.h104 * fixed value when the frame rate is decided, but ETHDR and
106 * MIXER has to sync with ETHDR by adjusting VSYNC length.
112 * ETHDR is bypassed, otherwise MIXER could wait too long and causing
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi3497 compatible = "mediatek,mt8195-disp-ethdr";