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/linux-6.8/drivers/usb/dwc3/
Dcore.c47 * @dwc: pointer to our context structure
49 static int dwc3_get_dr_mode(struct dwc3 *dwc) in dwc3_get_dr_mode() argument
52 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
55 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
56 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
58 mode = dwc->dr_mode; in dwc3_get_dr_mode()
59 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()
89 if (mode == USB_DR_MODE_OTG && !dwc->edev && in dwc3_get_dr_mode()
91 !device_property_read_bool(dwc->dev, "usb-role-switch")) && in dwc3_get_dr_mode()
96 if (mode != dwc->dr_mode) { in dwc3_get_dr_mode()
[all …]
Ddrd.c19 static void dwc3_otg_disable_events(struct dwc3 *dwc, u32 disable_mask) in dwc3_otg_disable_events() argument
21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
27 static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask) in dwc3_otg_enable_events() argument
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
35 static void dwc3_otg_clear_events(struct dwc3 *dwc) in dwc3_otg_clear_events() argument
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events()
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
54 struct dwc3 *dwc = _dwc; in dwc3_otg_thread_irq() local
[all …]
Dep0.c30 static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep);
31 static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
33 static int dwc3_ep0_delegate_req(struct dwc3 *dwc,
40 struct dwc3 *dwc; in dwc3_ep0_prepare_one_trb() local
42 dwc = dep->dwc; in dwc3_ep0_prepare_one_trb()
43 trb = &dwc->ep0_trb[dep->trb_enqueue]; in dwc3_ep0_prepare_one_trb()
68 struct dwc3 *dwc; in dwc3_ep0_start_trans() local
74 dwc = dep->dwc; in dwc3_ep0_start_trans()
77 params.param0 = upper_32_bits(dwc->ep0_trb_addr); in dwc3_ep0_start_trans()
78 params.param1 = lower_32_bits(dwc->ep0_trb_addr); in dwc3_ep0_start_trans()
[all …]
Dgadget.c35 * @dwc: pointer to our context structure
41 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode) in dwc3_gadget_set_test_mode() argument
45 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_gadget_set_test_mode()
60 dwc3_gadget_dctl_write_safe(dwc, reg); in dwc3_gadget_set_test_mode()
67 * @dwc: pointer to our context structure
72 int dwc3_gadget_get_link_state(struct dwc3 *dwc) in dwc3_gadget_get_link_state() argument
76 reg = dwc3_readl(dwc->regs, DWC3_DSTS); in dwc3_gadget_get_link_state()
83 * @dwc: pointer to our context structure
89 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state) in dwc3_gadget_set_link_state() argument
100 reg = dwc3_readl(dwc->regs, DWC3_DSTS); in dwc3_gadget_set_link_state()
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Ddebugfs.c287 struct dwc3 *dwc = s->private; in dwc3_host_lsp() local
293 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC); in dwc3_host_lsp()
295 sel = dwc->dbg_lsp_select; in dwc3_host_lsp()
303 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); in dwc3_host_lsp()
304 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); in dwc3_host_lsp()
309 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); in dwc3_host_lsp()
310 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); in dwc3_host_lsp()
317 struct dwc3 *dwc = s->private; in dwc3_gadget_lsp() local
323 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); in dwc3_gadget_lsp()
324 reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP); in dwc3_gadget_lsp()
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Dhost.c16 static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc, in dwc3_host_fill_xhci_irq_res() argument
19 struct platform_device *pdev = to_platform_device(dwc->dev); in dwc3_host_fill_xhci_irq_res()
22 dwc->xhci_resources[1].start = irq; in dwc3_host_fill_xhci_irq_res()
23 dwc->xhci_resources[1].end = irq; in dwc3_host_fill_xhci_irq_res()
24 dwc->xhci_resources[1].flags = IORESOURCE_IRQ | irq_get_trigger_type(irq); in dwc3_host_fill_xhci_irq_res()
26 dwc->xhci_resources[1].name = of_node_full_name(pdev->dev.of_node); in dwc3_host_fill_xhci_irq_res()
28 dwc->xhci_resources[1].name = name; in dwc3_host_fill_xhci_irq_res()
31 static int dwc3_host_get_irq(struct dwc3 *dwc) in dwc3_host_get_irq() argument
33 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); in dwc3_host_get_irq()
38 dwc3_host_fill_xhci_irq_res(dwc, irq, "host"); in dwc3_host_get_irq()
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Dulpi.c24 static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read) in dwc3_ulpi_busyloop() argument
36 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); in dwc3_ulpi_busyloop()
42 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0)); in dwc3_ulpi_busyloop()
53 struct dwc3 *dwc = dev_get_drvdata(dev); in dwc3_ulpi_read() local
58 dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg); in dwc3_ulpi_read()
60 ret = dwc3_ulpi_busyloop(dwc, addr, true); in dwc3_ulpi_read()
64 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0)); in dwc3_ulpi_read()
71 struct dwc3 *dwc = dev_get_drvdata(dev); in dwc3_ulpi_write() local
76 dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg); in dwc3_ulpi_write()
78 return dwc3_ulpi_busyloop(dwc, addr, false); in dwc3_ulpi_write()
[all …]
Ddwc3-pci.c209 static int dwc3_pci_quirks(struct dwc3_pci *dwc, in dwc3_pci_quirks() argument
212 struct pci_dev *pdev = dwc->pci; in dwc3_pci_quirks()
218 guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid); in dwc3_pci_quirks()
219 dwc->has_dsm_for_pm = true; in dwc3_pci_quirks()
272 dwc->dwc3->id = PLATFORM_DEVID_NONE; in dwc3_pci_quirks()
289 return device_add_software_node(&dwc->dwc3->dev, swnode); in dwc3_pci_quirks()
295 struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work); in dwc3_pci_resume_work() local
296 struct platform_device *dwc3 = dwc->dwc3; in dwc3_pci_resume_work()
312 struct dwc3_pci *dwc; in dwc3_pci_probe() local
325 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); in dwc3_pci_probe()
[all …]
Ddwc3-haps.c43 struct dwc3_haps *dwc; in dwc3_haps_probe() local
56 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); in dwc3_haps_probe()
57 if (!dwc) in dwc3_haps_probe()
60 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); in dwc3_haps_probe()
61 if (!dwc->dwc3) in dwc3_haps_probe()
75 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res)); in dwc3_haps_probe()
81 dwc->pci = pci; in dwc3_haps_probe()
82 dwc->dwc3->dev.parent = dev; in dwc3_haps_probe()
84 ret = device_add_software_node(&dwc->dwc3->dev, &dwc3_haps_swnode); in dwc3_haps_probe()
88 ret = platform_device_add(dwc->dwc3); in dwc3_haps_probe()
[all …]
Dcore.h678 * @dwc: pointer to DWC controller
692 struct dwc3 *dwc; member
714 * @dwc: pointer to DWC controller
740 struct dwc3 *dwc; member
866 * @ctrl: DWC-F
1531 void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode);
1532 void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
1536 (dwc->ip == _ip##_IP)
1539 (DWC3_IP_IS(_ip) && dwc->revision == _ip##_REVISION_##_ver)
1542 (DWC3_IP_IS(_ip) && dwc->revision < _ip##_REVISION_##_ver)
[all …]
Dgadget.h110 void dwc3_ep0_interrupt(struct dwc3 *dwc,
112 void dwc3_ep0_out_start(struct dwc3 *dwc);
113 void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep);
114 void dwc3_ep0_stall_and_restart(struct dwc3 *dwc);
120 void dwc3_ep0_send_delayed_status(struct dwc3 *dwc);
140 * @dwc: pointer to our context structure
146 static inline void dwc3_gadget_dctl_write_safe(struct dwc3 *dwc, u32 value) in dwc3_gadget_dctl_write_safe() argument
149 dwc3_writel(dwc->regs, DWC3_DCTL, value); in dwc3_gadget_dctl_write_safe()
Ddwc3-rtk.c58 struct dwc3 *dwc; member
87 if (!rtk->dwc->role_sw) in switch_dwc3_role()
90 usb_role_switch_set_role(rtk->dwc->role_sw, role); in switch_dwc3_role()
99 if (rtk->dwc && rtk->dwc->role_sw) in dwc3_rtk_get_role()
100 role = usb_role_switch_get_role(rtk->dwc->role_sw); in dwc3_rtk_get_role()
308 rtk->dwc = platform_get_drvdata(dwc3_pdev); in dwc3_rtk_probe_dwc3_core()
309 if (!rtk->dwc) { in dwc3_rtk_probe_dwc3_core()
316 if (dr_mode != rtk->dwc->dr_mode) { in dwc3_rtk_probe_dwc3_core()
318 dr_mode, rtk->dwc->dr_mode); in dwc3_rtk_probe_dwc3_core()
319 dr_mode = rtk->dwc->dr_mode; in dwc3_rtk_probe_dwc3_core()
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/linux-6.8/drivers/dma/dw/
Dcore.c48 static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc) in dwc_first_active() argument
50 return to_dw_desc(dwc->active_list.next); in dwc_first_active()
56 struct dw_dma_chan *dwc = to_dw_dma_chan(tx->chan); in dwc_tx_submit() local
60 spin_lock_irqsave(&dwc->lock, flags); in dwc_tx_submit()
69 list_add_tail(&desc->desc_node, &dwc->queue); in dwc_tx_submit()
70 spin_unlock_irqrestore(&dwc->lock, flags); in dwc_tx_submit()
77 static struct dw_desc *dwc_desc_get(struct dw_dma_chan *dwc) in dwc_desc_get() argument
79 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get()
87 dwc->descs_allocated++; in dwc_desc_get()
89 dma_async_tx_descriptor_init(&desc->txd, &dwc->chan); in dwc_desc_get()
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Ddw.c14 static void dw_dma_initialize_chan(struct dw_dma_chan *dwc) in dw_dma_initialize_chan() argument
16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan()
17 u32 cfghi = is_slave_direction(dwc->direction) ? 0 : DWC_CFGH_FIFO_MODE; in dw_dma_initialize_chan()
18 u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority); in dw_dma_initialize_chan()
19 bool hs_polarity = dwc->dws.hs_polarity; in dw_dma_initialize_chan()
21 cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id); in dw_dma_initialize_chan()
22 cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id); in dw_dma_initialize_chan()
28 channel_writel(dwc, CFG_LO, cfglo); in dw_dma_initialize_chan()
29 channel_writel(dwc, CFG_HI, cfghi); in dw_dma_initialize_chan()
32 static void dw_dma_suspend_chan(struct dw_dma_chan *dwc, bool drain) in dw_dma_suspend_chan() argument
[all …]
Didma32.c36 static unsigned int idma32_get_slave_devfn(struct dw_dma_chan *dwc) in idma32_get_slave_devfn() argument
38 struct device *slave = dwc->chan.slave; in idma32_get_slave_devfn()
46 static void idma32_initialize_chan_xbar(struct dw_dma_chan *dwc) in idma32_initialize_chan_xbar() argument
48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar()
58 value |= dwc->chan.chan_id; in idma32_initialize_chan_xbar()
63 value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
69 switch (dwc->direction) { in idma32_initialize_chan_xbar()
88 writel(value, misc + DMA_CTL_CH(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
91 value = readl(misc + DMA_XBAR_SEL(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
95 value |= idma32_get_slave_devfn(dwc); in idma32_initialize_chan_xbar()
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Dregs.h298 __dwc_regs(struct dw_dma_chan *dwc) in __dwc_regs() argument
300 return dwc->ch_regs; in __dwc_regs()
303 #define channel_readl(dwc, name) \ argument
304 readl(&(__dwc_regs(dwc)->name))
305 #define channel_writel(dwc, name, val) \ argument
306 writel((val), &(__dwc_regs(dwc)->name))
326 void (*initialize_chan)(struct dw_dma_chan *dwc);
327 void (*suspend_chan)(struct dw_dma_chan *dwc, bool drain);
328 void (*resume_chan)(struct dw_dma_chan *dwc, bool drain);
329 u32 (*prepare_ctllo)(struct dw_dma_chan *dwc);
[all …]
/linux-6.8/drivers/pwm/
Dpwm-dwc-core.c22 #include "pwm-dwc.h"
24 static void __dwc_pwm_set_enable(struct dwc_pwm *dwc, int pwm, int enabled) in __dwc_pwm_set_enable() argument
28 reg = dwc_pwm_readl(dwc, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
35 dwc_pwm_writel(dwc, reg, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
38 static int __dwc_pwm_configure_timer(struct dwc_pwm *dwc, in __dwc_pwm_configure_timer() argument
52 tmp = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, dwc->clk_ns); in __dwc_pwm_configure_timer()
58 dwc->clk_ns); in __dwc_pwm_configure_timer()
70 __dwc_pwm_set_enable(dwc, pwm->hwpwm, false); in __dwc_pwm_configure_timer()
78 dwc_pwm_writel(dwc, low, DWC_TIM_LD_CNT(pwm->hwpwm)); in __dwc_pwm_configure_timer()
79 dwc_pwm_writel(dwc, high, DWC_TIM_LD_CNT2(pwm->hwpwm)); in __dwc_pwm_configure_timer()
[all …]
Dpwm-dwc.c26 #include "pwm-dwc.h"
31 struct dwc_pwm *dwc; in dwc_pwm_probe() local
34 dwc = dwc_pwm_alloc(dev); in dwc_pwm_probe()
35 if (!dwc) in dwc_pwm_probe()
52 dwc->base = pcim_iomap_table(pci)[0]; in dwc_pwm_probe()
53 if (!dwc->base) { in dwc_pwm_probe()
58 ret = devm_pwmchip_add(dev, &dwc->chip); in dwc_pwm_probe()
77 struct dwc_pwm *dwc = pci_get_drvdata(pdev); in dwc_pwm_suspend() local
81 if (dwc->chip.pwms[i].state.enabled) { in dwc_pwm_suspend()
83 i, dwc->chip.pwms[i].label); in dwc_pwm_suspend()
[all …]
/linux-6.8/Documentation/devicetree/bindings/ata/
Drockchip,dwc-ahci.yaml4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
7 title: Synopsys DWC AHCI SATA controller for Rockchip devices
13 This document defines device tree bindings for the Synopsys DWC
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
31 - rockchip,rk3568-dwc-ahci
32 - rockchip,rk3588-dwc-ahci
33 - const: snps,dwc-ahci
39 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
59 - $ref: snps,dwc-ahci-common.yaml#
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Dsnps,dwc-ahci.yaml4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
7 title: Synopsys DWC AHCI SATA controller
13 This document defines device tree bindings for the generic Synopsys DWC
20 - snps,dwc-ahci
26 - $ref: snps,dwc-ahci-common.yaml#
32 const: snps,dwc-ahci
38 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
55 compatible = "snps,dwc-ahci";
Dsnps,dwc-ahci-common.yaml4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#
7 title: Synopsys DWC AHCI SATA controller properties
13 This document defines device tree schema for the generic Synopsys DWC
30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,
61 normally supported by the DWC AHCI SATA controller.
83 $ref: '#/$defs/dwc-ahci-port'
88 dwc-ahci-port:
/linux-6.8/drivers/net/ethernet/synopsys/
DMakefile6 obj-$(CONFIG_DWC_XLGMAC) += dwc-xlgmac.o
7 dwc-xlgmac-objs := dwc-xlgmac-net.o dwc-xlgmac-desc.o \
8 dwc-xlgmac-hw.o dwc-xlgmac-common.o \
9 dwc-xlgmac-ethtool.o
11 dwc-xlgmac-$(CONFIG_DWC_XLGMAC_PCI) += dwc-xlgmac-pci.o
/linux-6.8/drivers/ufs/host/
DMakefile3 obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o ufshcd-dwc.o tc-dwc-g210.o
4 obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o ufshcd-dwc.o tc-dwc-g210.o
Dtc-dwc-g210-pltfrm.c18 #include "ufshcd-dwc.h"
19 #include "tc-dwc-g210.h"
22 * UFS DWC specific variant operations
25 .name = "tc-dwc-g210-pltfm",
31 .name = "tc-dwc-g210-pltfm",
94 .name = "tc-dwc-g210-pltfm",
102 MODULE_ALIAS("platform:tc-dwc-g210-pltfm");
/linux-6.8/Documentation/devicetree/bindings/net/
Dsnps,dwc-qos-ethernet.txt1 * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
72 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
78 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
83 - "snps,dwc-qos-ethernet-4.10" (deprecated):
97 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
99 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
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