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Searched full:disp_cc_mdss_vsync_clk (Results 1 – 25 of 68) sorted by relevance

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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8150-dpu.yaml63 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
66 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sc8280xp-mdss.yaml104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm6125-mdss.yaml122 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
131 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm6375-mdss.yaml116 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
126 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8350-mdss.yaml140 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
148 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm6350-mdss.yaml125 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
130 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
/linux/drivers/clk/qcom/
H A Ddispcc-qcm2290.c411 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
418 .name = "disp_cc_mdss_vsync_clk",
479 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
H A Ddispcc-sm6375.c462 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
469 .name = "disp_cc_mdss_vsync_clk",
537 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
H A Ddispcc-sm6115.c478 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
485 .name = "disp_cc_mdss_vsync_clk",
546 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
H A Ddispcc-sc7180.c609 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
616 .name = "disp_cc_mdss_vsync_clk",
672 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
H A Ddispcc-sm6350.c637 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
644 .name = "disp_cc_mdss_vsync_clk",
724 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
/linux/include/dt-bindings/clock/
H A Dqcom,dispcc-qcm2290.h25 #define DISP_CC_MDSS_VSYNC_CLK 15 macro
H A Dqcom,sm6115-dispcc.h28 #define DISP_CC_MDSS_VSYNC_CLK 18 macro
H A Dqcom,dispcc-sm6125.h34 #define DISP_CC_MDSS_VSYNC_CLK 25 macro
H A Dqcom,sm6375-dispcc.h30 #define DISP_CC_MDSS_VSYNC_CLK 19 macro
H A Dqcom,dispcc-sc7180.h39 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
H A Dqcom,sm4450-dispcc.h33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
H A Dqcom,dispcc-sm6350.h40 #define DISP_CC_MDSS_VSYNC_CLK 29 macro
H A Dqcom,dispcc-sdm845.h33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
H A Dqcom,qcs615-dispcc.h40 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
H A Dqcom,dispcc-sc7280.h47 #define DISP_CC_MDSS_VSYNC_CLK 37 macro
H A Dqcom,milos-dispcc.h45 #define DISP_CC_MDSS_VSYNC_CLK 34 macro
H A Dqcom,dispcc-sm8350.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
H A Dqcom,dispcc-sm8150.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
H A Dqcom,dispcc-sm8250.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro

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