/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sm8150-dpu.yaml | 63 <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 66 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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H A D | qcom,sc8280xp-mdss.yaml | 104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; 112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
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H A D | qcom,sm6125-mdss.yaml | 122 <&dispcc DISP_CC_MDSS_VSYNC_CLK>, 131 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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H A D | qcom,sm6375-mdss.yaml | 116 <&dispcc DISP_CC_MDSS_VSYNC_CLK>, 126 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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H A D | qcom,sm8350-mdss.yaml | 140 <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 148 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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H A D | qcom,sm6350-mdss.yaml | 125 <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 130 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
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/linux/drivers/clk/qcom/ |
H A D | dispcc-qcm2290.c | 411 static struct clk_branch disp_cc_mdss_vsync_clk = { variable 418 .name = "disp_cc_mdss_vsync_clk", 479 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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H A D | dispcc-sm6375.c | 462 static struct clk_branch disp_cc_mdss_vsync_clk = { variable 469 .name = "disp_cc_mdss_vsync_clk", 537 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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H A D | dispcc-sm6115.c | 478 static struct clk_branch disp_cc_mdss_vsync_clk = { variable 485 .name = "disp_cc_mdss_vsync_clk", 546 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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H A D | dispcc-sc7180.c | 609 static struct clk_branch disp_cc_mdss_vsync_clk = { variable 616 .name = "disp_cc_mdss_vsync_clk", 672 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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H A D | dispcc-sm6350.c | 637 static struct clk_branch disp_cc_mdss_vsync_clk = { variable 644 .name = "disp_cc_mdss_vsync_clk", 724 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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/linux/include/dt-bindings/clock/ |
H A D | qcom,dispcc-qcm2290.h | 25 #define DISP_CC_MDSS_VSYNC_CLK 15 macro
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H A D | qcom,sm6115-dispcc.h | 28 #define DISP_CC_MDSS_VSYNC_CLK 18 macro
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H A D | qcom,dispcc-sm6125.h | 34 #define DISP_CC_MDSS_VSYNC_CLK 25 macro
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H A D | qcom,sm6375-dispcc.h | 30 #define DISP_CC_MDSS_VSYNC_CLK 19 macro
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H A D | qcom,dispcc-sc7180.h | 39 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
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H A D | qcom,sm4450-dispcc.h | 33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
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H A D | qcom,dispcc-sm6350.h | 40 #define DISP_CC_MDSS_VSYNC_CLK 29 macro
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H A D | qcom,dispcc-sdm845.h | 33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
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H A D | qcom,qcs615-dispcc.h | 40 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
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H A D | qcom,dispcc-sc7280.h | 47 #define DISP_CC_MDSS_VSYNC_CLK 37 macro
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H A D | qcom,milos-dispcc.h | 45 #define DISP_CC_MDSS_VSYNC_CLK 34 macro
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H A D | qcom,dispcc-sm8350.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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H A D | qcom,dispcc-sm8150.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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H A D | qcom,dispcc-sm8250.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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