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/linux/Documentation/devicetree/bindings/mfd/
H A Dwm831x.txt37 dcdc1 : DCDC1
70 dcdc1: dcdc1 {
71 regulator-name = "DCDC1";
H A Dactions,atc260x.yaml147 dcdc1-supply = <&reg_5v0>;
152 vdd_cpu: dcdc1 {
H A Drockchip,rk816.yaml52 The input supply for dcdc1.
145 vdd_cpu: dcdc1 {
H A Dtps65912.txt35 dcdc1 {
H A Dricoh,rn5t618.yaml100 DCDC1 {
/linux/Documentation/devicetree/bindings/regulator/
H A Dtps65090.txt17 - ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3.
19 - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
52 dcdc1 {
53 regulator-name = "dcdc1";
H A Dtps65218.txt15 tps65217: regulator-dcdc1, regulator-dcdc2, regulator-dcdc3, regulator-dcdc4,
27 dcdc1: regulator-dcdc1 {
H A Dtps65217.txt18 tps65217: dcdc1, dcdc2, dcdc3, ldo1, ldo2, ldo3 and ldo4
29 dcdc1_reg: dcdc1 {
/linux/drivers/regulator/
H A Dtps65912-regulator.c19 enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3, enumerator
73 TPS65912_REGULATOR("DCDC1", DCDC1, "dcdc1", tps65912_ops_dcdc,
H A Daxp20x-regulator.c647 AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
662 /* secondary switchable output of DCDC1 */
747 AXP_DESC_RANGES(AXP313A, DCDC1, "dcdc1", "vin1",
790 AXP_DESC_RANGES_DELAY(AXP717, DCDC1, "dcdc1", "vin1",
896 AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
919 /* secondary switchable output of DCDC1 */
[all...]
H A Drn5t618-regulator.c45 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
62 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
78 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
H A Dtps65217-regulator.c170 TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, "dcdc1",
H A Dact8945a-regulator.c255 ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET1, "vp1"),
265 ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET2, "vp1"),
/linux/arch/arm64/boot/dts/allwinner/
H A Daxp803.dtsi56 reg_dcdc1: dcdc1 {
57 regulator-name = "dcdc1";
H A Dsun55i-h728-x96qpro+.dts123 reg_dcdc1: dcdc1 {
250 reg_dcdc1_323: dcdc1 {
257 /* DCDC2 is polyphased with DCDC1 */
H A Dsun55i-a527-cubie-a5e.dts130 reg_dcdc1: dcdc1 {
258 reg_dcdc1_323: dcdc1 {
265 /* DCDC2 is polyphased with DCDC1 */
H A Dsun55i-t527-avaota-a1.dts151 reg_dcdc1: dcdc1 {
280 reg_dcdc1_323: dcdc1 {
287 /* DCDC2 is polyphased with DCDC1 */
H A Dsun55i-t527-orangepi-4a.dts179 reg_dcdc1: dcdc1 {
320 reg_dcdc1_323: dcdc1 {
327 /* DCDC2 is polyphased with DCDC1 */
H A Dsun50i-h618-longan-module-3h.dtsi55 reg_dcdc1: dcdc1 {
/linux/include/linux/mfd/wm8350/
H A Dpmic.h153 * R180 (0xB4) - DCDC1 Control
160 * R181 (0xB5) - DCDC1 Timeouts
176 * R182 (0xB6) - DCDC1 Low Power
575 * R248 (0xF8) - DCDC1 Force PWM
590 * R253 (0xFD) - DCDC1 Force PWM
/linux/arch/arm/boot/dts/allwinner/
H A Daxp22x.dtsi80 reg_dcdc1: dcdc1 {
81 regulator-name = "dcdc1";
/linux/arch/arm/boot/dts/actions/
H A Dowl-s500-roseapplepi.dts59 dcdc1-supply = <&syspwr>;
73 vdd_cpu: dcdc1 {
/linux/arch/arm/boot/dts/
H A Dtps65217.dtsi35 regulator-compatible = "dcdc1";
/linux/arch/arm/boot/dts/nxp/imx/
H A De70k02.dtsi152 dcdc1_reg: DCDC1 {
153 regulator-name = "DCDC1";
H A De60k02.dtsi138 dcdc1_reg: DCDC1 {
139 regulator-name = "DCDC1";

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